nexus: Disable center DCC-thrus on 17k device

Signed-off-by: gatecat <gatecat@ds0.me>

nexus/arch.cc

@@ -171,6 +171,19 @@ Arch::Arch(ArchArgs args) : args(args)
 
     BaseArch::init_cell_types();
     BaseArch::init_bel_buckets();
+
+    if (device == "LIFCL-17") {
+        for (BelId bel : getBelsByTile(37, 10)) {
+            // These pips currently don't work, due to routing differences between the variants that the DB format needs
+            // some tweaks to accomodate properly
+            if (getBelType(bel) != id_DCC)
+                continue;
+            WireId w = getBelPinWire(bel, id_CLKI);
+            for (auto pip : getPipsUphill(w))
+                disabled_pips.insert(pip);
+        }
+        NPNR_ASSERT(disabled_pips.size() == 4);
+    }
 }
 
 // -----------------------------------------------------------------------

nexus/arch.h

@@ -918,6 +918,8 @@ struct Arch : BaseArch<ArchRanges>
     // inverse of the above for name->object mapping
     dict<IdString, int> id_to_x, id_to_y;
 
+    pool<PipId> disabled_pips;
+
     // -------------------------------------------------
 
     std::string getChipName() const override;
@@ -976,6 +978,20 @@ struct Arch : BaseArch<ArchRanges>
         return tileStatus[bel.tile].boundcells[bel.index] == nullptr;
     }
 
+    bool checkPipAvail(PipId pip) const override
+    {
+        if (disabled_pips.count(pip))
+            return false;
+        return BaseArch::checkPipAvail(pip);
+    }
+
+    bool checkPipAvailForNet(PipId pip, NetInfo *net) const override
+    {
+        if (disabled_pips.count(pip))
+            return false;
+        return BaseArch::checkPipAvailForNet(pip, net);
+    }
+
     CellInfo *getBoundBelCell(BelId bel) const override
     {
         NPNR_ASSERT(bel != BelId());

nexus/fasm.cc

@@ -312,7 +312,6 @@ struct NexusFasmWriter
                 }
             }
             NPNR_ASSERT(found);
-
         }
     }