From 3dfc5b864a66ba1bfc286de884bd46a859e4306d Mon Sep 17 00:00:00 2001 From: David Shah Date: Mon, 1 Oct 2018 17:51:36 +0100 Subject: [PATCH] ecp5: Remove broken DRAM timing arc Signed-off-by: David Shah --- ecp5/arch.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ecp5/arch.cc b/ecp5/arch.cc index 830dfc7c..6cd83cce 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -511,12 +511,12 @@ bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort delay.delay = 193; return true; } - +#if 0 //FIXME if (fromPort == id_WCK && (toPort == id_F0 || toPort == id_F1)) { delay.delay = 717; return true; } - +#endif if ((fromPort == id_A0 && toPort == id_WADO3) || (fromPort == id_A1 && toPort == id_WDO1) || (fromPort == id_B0 && toPort == id_WADO1) || (fromPort == id_B1 && toPort == id_WDO3) || (fromPort == id_C0 && toPort == id_WADO2) || (fromPort == id_C1 && toPort == id_WDO0) ||