gowin: Himbaechel. Fix problems.
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
This commit is contained in:
YRabbit
myrtle
parent
aca14cc420
commit
3e0b9826b5
@ -4,6 +4,7 @@ project(himbaechel-gowin-chipdb NONE)
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find_package(Python3 3.5 REQUIRED COMPONENTS Interpreter)
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set(ALL_HIMBAECHEL_GOWIN_DEVICES GW1N-1 GW1NZ-1 GW1NS-2 GW1N-4 GW1N-9 GW1N-9C GW1NS-4 GW2A-18 GW2A-18C)
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set(ALL_HIMBAECHEL_GOWIN_DEVICES "")
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set(HIMBAECHEL_GOWIN_DEVICES ${ALL_HIMBAECHEL_GOWIN_DEVICES} CACHE STRING
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"Include support for these Gowin devices (available: ${ALL_HIMBAECHEL_GOWIN_DEVICES})")
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message(STATUS "Enabled Himbaechel-Gowin devices: ${HIMBAECHEL_GOWIN_DEVICES}")
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@ -57,10 +57,10 @@ struct GowinPacker
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log_info("simple:%s\n", ctx->nameOf(&ci));
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ci.addInput(id_OEN);
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if (ci.type == id_OBUF) {
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ci.connectPort(id_OEN, ctx->nets[ctx->id("$PACKER_GND")].get());
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ci.connectPort(id_OEN, ctx->nets.at(ctx->id("$PACKER_GND")).get());
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} else {
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NPNR_ASSERT(ci.type == id_IBUF);
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ci.connectPort(id_OEN, ctx->nets[ctx->id("$PACKER_VCC")].get());
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ci.connectPort(id_OEN, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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}
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}
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@ -81,10 +81,10 @@ struct GowinPacker
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ci.disconnectPort(port);
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ci.addInput(port);
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if (net_name == id_VSS) {
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ci.connectPort(port, ctx->nets[ctx->id("$PACKER_GND")].get());
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ci.connectPort(port, ctx->nets.at(ctx->id("$PACKER_GND")).get());
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} else {
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NPNR_ASSERT(net_name == id_VCC);
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ci.connectPort(port, ctx->nets[ctx->id("$PACKER_VCC")].get());
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ci.connectPort(port, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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}
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};
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@ -325,11 +325,11 @@ struct GowinPacker
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std::vector<IdString> pins = ctx->getBelPins(bel);
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if (std::find(pins.begin(), pins.end(), id_DAADJ0) != pins.end()) {
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ci.addInput(id_DAADJ0);
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ci.connectPort(id_DAADJ0, ctx->nets[ctx->id("$PACKER_GND")].get());
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ci.connectPort(id_DAADJ0, ctx->nets.at(ctx->id("$PACKER_GND")).get());
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}
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if (std::find(pins.begin(), pins.end(), id_DAADJ1) != pins.end()) {
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ci.addInput(id_DAADJ1);
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ci.connectPort(id_DAADJ1, ctx->nets[ctx->id("$PACKER_VCC")].get());
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ci.connectPort(id_DAADJ1, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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}
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}
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@ -483,8 +483,8 @@ struct GowinPacker
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BelId io_bel = gwu.get_io_bel_from_iologic(bel);
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if (!ctx->checkBelAvail(io_bel)) {
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if (!is_diff_io(io_bel)) {
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log_error("Can't place %s at %s because of %s\n", ctx->nameOf(&ci), ctx->nameOfBel(bel),
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ctx->nameOf(ctx->getBoundBelCell(io_bel)));
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log_error("Can't place %s at %s because of a conflict with another IO %s\n", ctx->nameOf(&ci),
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ctx->nameOfBel(bel), ctx->nameOf(ctx->getBoundBelCell(io_bel)));
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}
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}
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@ -505,6 +505,7 @@ struct GowinPacker
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void reconnect_ides_outs(CellInfo *ci)
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{
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IdString dest_ports[] = {id_Q9, id_Q8, id_Q7, id_Q6, id_Q5, id_Q4, id_Q3, id_Q2};
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switch (ci->type.hash()) {
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case ID_IDDR: /* fall-through*/
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case ID_IDDRC:
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@ -512,29 +513,19 @@ struct GowinPacker
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ci->renamePort(id_Q0, id_Q8);
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break;
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case ID_IDES4:
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ci->renamePort(id_Q3, id_Q9);
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ci->renamePort(id_Q2, id_Q8);
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ci->renamePort(id_Q1, id_Q7);
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ci->renamePort(id_Q0, id_Q6);
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for (int i = 0; i < 4; ++i) {
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ci->renamePort(ctx->idf("Q%d", 3 - i), dest_ports[i]);
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}
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break;
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case ID_IVIDEO:
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ci->renamePort(id_Q6, id_Q9);
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ci->renamePort(id_Q5, id_Q8);
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ci->renamePort(id_Q4, id_Q7);
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ci->renamePort(id_Q3, id_Q6);
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ci->renamePort(id_Q2, id_Q5);
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ci->renamePort(id_Q1, id_Q4);
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ci->renamePort(id_Q0, id_Q3);
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for (int i = 0; i < 7; ++i) {
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ci->renamePort(ctx->idf("Q%d", 6 - i), dest_ports[i]);
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}
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break;
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case ID_IDES8:
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ci->renamePort(id_Q7, id_Q9);
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ci->renamePort(id_Q6, id_Q8);
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ci->renamePort(id_Q5, id_Q7);
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ci->renamePort(id_Q4, id_Q6);
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ci->renamePort(id_Q3, id_Q5);
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ci->renamePort(id_Q2, id_Q4);
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ci->renamePort(id_Q1, id_Q3);
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ci->renamePort(id_Q0, id_Q2);
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for (int i = 0; i < 8; ++i) {
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ci->renamePort(ctx->idf("Q%d", 7 - i), dest_ports[i]);
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}
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break;
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default:
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break;
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@ -1008,13 +999,13 @@ struct GowinPacker
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if (cin_net->name == ctx->id("$PACKER_GND")) {
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cin_ci->params[id_ALU_MODE] = std::string("C2L");
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cin_ci->addInput(id_I2);
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cin_ci->connectPort(id_I2, ctx->nets[ctx->id("$PACKER_VCC")].get());
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cin_ci->connectPort(id_I2, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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return cin_ci;
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}
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if (cin_net->name == ctx->id("$PACKER_VCC")) {
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cin_ci->params[id_ALU_MODE] = std::string("ONE2C");
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cin_ci->addInput(id_I2);
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cin_ci->connectPort(id_I2, ctx->nets[ctx->id("$PACKER_VCC")].get());
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cin_ci->connectPort(id_I2, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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return cin_ci;
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}
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// CIN from logic
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@ -1023,7 +1014,7 @@ struct GowinPacker
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cin_ci->connectPort(id_I1, cin_net);
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cin_ci->connectPort(id_I3, cin_net);
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cin_ci->addInput(id_I2);
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cin_ci->connectPort(id_I2, ctx->nets[ctx->id("$PACKER_VCC")].get());
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cin_ci->connectPort(id_I2, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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cin_ci->params[id_ALU_MODE] = std::string("0"); // ADD
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return cin_ci;
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}
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@ -1045,7 +1036,7 @@ struct GowinPacker
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cout_ci->addOutput(id_SUM);
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cout_ci->connectPort(id_SUM, cout_net);
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cout_ci->addInput(id_I2);
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cout_ci->connectPort(id_I2, ctx->nets[ctx->id("$PACKER_VCC")].get());
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cout_ci->connectPort(id_I2, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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cout_ci->params[id_ALU_MODE] = std::string("C2L");
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return cout_ci;
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@ -1111,7 +1102,7 @@ struct GowinPacker
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// XXX I2 is pin C which must be set to 1 for all ALU modes except MUL
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// we use only mode 2 ADDSUB so create and connect this pin
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ci->addInput(id_I2);
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ci->connectPort(id_I2, ctx->nets[ctx->id("$PACKER_VCC")].get());
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ci->connectPort(id_I2, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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++alu_chain_len;
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@ -1225,7 +1216,7 @@ struct GowinPacker
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ci->constr_z = BelZ::RAMW_Z;
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ci->addInput(id_CE);
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ci->connectPort(id_CE, ctx->nets[ctx->id("$PACKER_VCC")].get());
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ci->connectPort(id_CE, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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// RAD networks
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NetInfo *rad[4];
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@ -1288,7 +1279,7 @@ struct GowinPacker
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// make default GSR
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auto gsr_cell = std::make_unique<CellInfo>(ctx, id_GSR, id_GSR);
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gsr_cell->addInput(id_GSRI);
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gsr_cell->connectPort(id_GSRI, ctx->nets[ctx->id("$PACKER_VCC")].get());
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gsr_cell->connectPort(id_GSRI, ctx->nets.at(ctx->id("$PACKER_VCC")).get());
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ctx->cells[gsr_cell->name] = std::move(gsr_cell);
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}
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if (ctx->verbose) {
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