DSP cascading
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db5d26c129
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@ -96,6 +96,7 @@ enum ClusterPlacement
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PLACE_XRF_WA6,
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PLACE_XRF_WA6,
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PLACE_XRF_WE,
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PLACE_XRF_WE,
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PLACE_XRF_WEA,
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PLACE_XRF_WEA,
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PLACE_DSP_CHAIN,
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};
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};
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enum PipExtra
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enum PipExtra
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@ -86,6 +86,21 @@ void NgUltraImpl::init(Context *ctx)
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}
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}
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locations.emplace(stringf("%s:%s",tile_name(bel.tile).c_str(), ctx->getBelName(bel)[1].c_str(ctx)),bel);
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locations.emplace(stringf("%s:%s",tile_name(bel.tile).c_str(), ctx->getBelName(bel)[1].c_str(ctx)),bel);
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}
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}
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for (auto bel : ctx->getBels()) {
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if (ctx->getBelType(bel) == id_DSP) {
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WireId cco = ctx->getBelPinWire(bel,id_CCO);
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WireId cci;
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for (auto dh : ctx->getPipsDownhill(cco)) {
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cci = ctx->getPipDstWire(dh);
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}
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if (cci!=WireId()) {
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std::string loc = stringf("%s:%s",tile_name(cci.tile).c_str(), ctx->getWireName(cci)[1].c_str(ctx));
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loc.erase(loc.find(".CCI"));
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BelId dsp_bel = locations[loc];
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dsp_cascade.emplace(dsp_bel, bel);
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}
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}
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}
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}
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}
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const NGUltraTileInstExtraDataPOD *NgUltraImpl::tile_extra_data(int tile) const
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const NGUltraTileInstExtraDataPOD *NgUltraImpl::tile_extra_data(int tile) const
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@ -421,6 +436,13 @@ bool NgUltraImpl::isValidBelForCellType(IdString cell_type, BelId bel) const
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return (bel_type == cell_type);
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return (bel_type == cell_type);
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}
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}
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Loc getNextLocInDSPChain(const NgUltraImpl *impl, Loc loc)
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{
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BelId bel = impl->ctx->getBelByLocation(loc);
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BelId dsp = impl->dsp_cascade.at(bel);
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return impl->ctx->getBelLocation(dsp);
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}
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Loc getNextLocInCYChain(Loc loc)
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Loc getNextLocInCYChain(Loc loc)
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{
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{
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static const std::vector<Loc> map =
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static const std::vector<Loc> map =
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@ -567,6 +589,7 @@ bool NgUltraImpl::getChildPlacement(const BaseClusterInfo *cluster, Loc root_loc
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case PLACE_CY_FE4: return getCYFE(root_loc,3);
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case PLACE_CY_FE4: return getCYFE(root_loc,3);
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case PLACE_XRF_I1 ... PLACE_XRF_WEA:
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case PLACE_XRF_I1 ... PLACE_XRF_WEA:
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return getXRFFE(root_loc, child->constr_z - PLACE_XRF_I1 );
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return getXRFFE(root_loc, child->constr_z - PLACE_XRF_I1 );
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case PLACE_DSP_CHAIN : { Loc l = getNextLocInDSPChain(this, prev); prev = l; return l; }
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default:
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default:
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Loc result;
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Loc result;
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result.x = root_loc.x + child->constr_x;
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result.x = root_loc.x + child->constr_x;
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@ -77,6 +77,7 @@ public:
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dict<IdString, std::pair<IdString,IdString>> bank_to_ckg;
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dict<IdString, std::pair<IdString,IdString>> bank_to_ckg;
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dict<BelId, IdString> unused_wfg;
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dict<BelId, IdString> unused_wfg;
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dict<BelId, IdString> unused_pll;
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dict<BelId, IdString> unused_pll;
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dict<BelId, BelId> dsp_cascade;
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private:
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private:
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void write_bitstream_json(const std::string &filename);
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void write_bitstream_json(const std::string &filename);
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@ -1065,8 +1065,8 @@ void NgUltraPacker::insert_wfbs()
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for (auto &cell : ctx->cells) {
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for (auto &cell : ctx->cells) {
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CellInfo &ci = *cell.second;
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CellInfo &ci = *cell.second;
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if (ci.type.in(id_IOM)) {
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if (ci.type.in(id_IOM)) {
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//insert_wfb(&ci, id_CKO1);
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insert_wfb(&ci, id_CKO1);
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//insert_wfb(&ci, id_CKO2);
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insert_wfb(&ci, id_CKO2);
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} else if (ci.type.in(id_PLL)) {
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} else if (ci.type.in(id_PLL)) {
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insert_wfb(&ci, id_VCO);
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insert_wfb(&ci, id_VCO);
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insert_wfb(&ci, id_REFO);
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insert_wfb(&ci, id_REFO);
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@ -1349,6 +1349,8 @@ void NgUltraPacker::dsp_same_sink(IdString port, CellInfo *cell, CellInfo **targ
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void NgUltraPacker::pack_dsps(void)
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void NgUltraPacker::pack_dsps(void)
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{
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{
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log_info("Packing DSPs..\n");
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log_info("Packing DSPs..\n");
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dict<IdString, CellInfo*> dsp_output;
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std::vector<CellInfo *> root_dsps;
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for (auto &cell : ctx->cells) {
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for (auto &cell : ctx->cells) {
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CellInfo &ci = *cell.second;
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CellInfo &ci = *cell.second;
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if (!ci.type.in(id_NX_DSP_U))
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if (!ci.type.in(id_NX_DSP_U))
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@ -1370,6 +1372,8 @@ void NgUltraPacker::pack_dsps(void)
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for(int i=1;i<=56;i++)
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for(int i=1;i<=56;i++)
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dsp_same_driver(ctx->idf("CZI%d",i), &ci, &dsp);
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dsp_same_driver(ctx->idf("CZI%d",i), &ci, &dsp);
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dsp_same_driver(id_CCI, &ci, &dsp);
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dsp_same_driver(id_CCI, &ci, &dsp);
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if (!dsp)
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root_dsps.push_back(&ci);
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// CAO1-24, CBO1-18, CZO1..56 and CCO must go to same DSP
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// CAO1-24, CBO1-18, CZO1..56 and CCO must go to same DSP
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dsp = nullptr;
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dsp = nullptr;
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@ -1380,6 +1384,20 @@ void NgUltraPacker::pack_dsps(void)
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for(int i=1;i<=56;i++)
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for(int i=1;i<=56;i++)
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dsp_same_sink(ctx->idf("CZO%d",i), &ci, &dsp);
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dsp_same_sink(ctx->idf("CZO%d",i), &ci, &dsp);
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dsp_same_sink(id_CCO, &ci, &dsp);
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dsp_same_sink(id_CCO, &ci, &dsp);
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if (dsp)
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dsp_output.emplace(ci.name, dsp);
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}
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for (auto root : root_dsps) {
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CellInfo *dsp = root;
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if (dsp_output.count(dsp->name)==0) continue;
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root->cluster = root->name;
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while (true) {
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if (dsp_output.count(dsp->name)==0) break;
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dsp = dsp_output[dsp->name];
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dsp->cluster = root->name;
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root->constr_children.push_back(dsp);
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dsp->constr_z = PLACE_DSP_CHAIN;
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}
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}
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}
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}
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}
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void NgUltraPacker::setup()
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void NgUltraPacker::setup()
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@ -1698,6 +1716,7 @@ void NgUltraPacker::insert_bypass_gck()
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clock_sinks[id_XPRF].insert(id_WCK2);
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clock_sinks[id_XPRF].insert(id_WCK2);
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clock_sinks[id_RAM].insert(id_ACK);
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clock_sinks[id_RAM].insert(id_ACK);
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clock_sinks[id_RAM].insert(id_BCK);
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clock_sinks[id_RAM].insert(id_BCK);
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clock_sinks[id_DSP].insert(id_CK);
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//glb_sources[id_BFR].insert(id_O);
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//glb_sources[id_BFR].insert(id_O);
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//glb_sources[id_GCK].insert(id_SO);
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//glb_sources[id_GCK].insert(id_SO);
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