add aliases
This commit is contained in:
parent
9fd85e4fad
commit
401584bf89
135
gowin/arch.cc
135
gowin/arch.cc
@ -19,8 +19,8 @@
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#include <iostream>
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#include <iostream>
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#include <math.h>
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#include <math.h>
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#include "nextpnr.h"
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#include "embed.h"
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#include "embed.h"
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#include "nextpnr.h"
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#include "placer1.h"
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#include "placer1.h"
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#include "placer_heap.h"
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#include "placer_heap.h"
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#include "router1.h"
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#include "router1.h"
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@ -249,7 +249,8 @@ void Arch::addCellTimingClockToOut(IdString cell, IdString port, IdString clock,
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// ---------------------------------------------------------------
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// ---------------------------------------------------------------
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// TODO represent wires more intelligently.
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// TODO represent wires more intelligently.
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IdString Arch::wireToGlobal(int row, int col, const DatabasePOD* db, IdString wire) {
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IdString Arch::wireToGlobal(int &row, int &col, const DatabasePOD *db, IdString wire)
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{
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std::string wirename = wire.str(this);
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std::string wirename = wire.str(this);
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char buf[32];
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char buf[32];
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if (wirename == "VCC" || wirename == "GND") {
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if (wirename == "VCC" || wirename == "GND") {
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@ -262,24 +263,18 @@ IdString Arch::wireToGlobal(int row, int col, const DatabasePOD* db, IdString wi
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char direction = wirename[0];
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char direction = wirename[0];
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int num = std::stoi(wirename.substr(1, 2));
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int num = std::stoi(wirename.substr(1, 2));
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int segment = std::stoi(wirename.substr(3, 1));
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int segment = std::stoi(wirename.substr(3, 1));
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int rootrow, rootcol;
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switch (direction) {
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switch (direction)
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{
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case 'N':
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case 'N':
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rootrow = row + segment;
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row += segment;
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rootcol = col;
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break;
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break;
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case 'S':
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case 'S':
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rootrow = row - segment;
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row -= segment;
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rootcol = col;
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break;
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break;
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case 'E':
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case 'E':
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rootrow = row;
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col -= segment;
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rootcol = col - segment;
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break;
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break;
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case 'W':
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case 'W':
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rootrow = row;
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col += segment;
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rootcol = col + segment;
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break;
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break;
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default:
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default:
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, wirename.c_str());
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, wirename.c_str());
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@ -288,24 +283,25 @@ IdString Arch::wireToGlobal(int row, int col, const DatabasePOD* db, IdString wi
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}
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}
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// wires wrap around the edges
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// wires wrap around the edges
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// assumes 0-based indexes
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// assumes 0-based indexes
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if(rootrow < 0) {
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if (row < 0) {
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rootrow = -1-rootrow;
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row = -1 - row;
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direction = 'N';
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direction = 'N';
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} else if(rootcol < 0) {
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} else if (col < 0) {
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rootcol = -1-rootcol;
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col = -1 - col;
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direction = 'W';
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direction = 'W';
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} else if(rootrow >= db->rows) {
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} else if (row >= db->rows) {
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rootrow = 2*db->rows-1-rootrow;
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row = 2 * db->rows - 1 - row;
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direction = 'S';
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direction = 'S';
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} else if(rootcol >= db->cols) {
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} else if (col >= db->cols) {
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rootcol = 2*db->cols-1-rootcol;
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col = 2 * db->cols - 1 - col;
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direction = 'E';
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direction = 'E';
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}
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}
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snprintf(buf, 32, "R%dC%d_%c%d", rootrow+1, rootcol+1, direction, num);
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snprintf(buf, 32, "R%dC%d_%c%d", row + 1, col + 1, direction, num);
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return id(buf);
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return id(buf);
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}
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}
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PairPOD pairLookup(const PairPOD* list, const size_t len, const int src, const int dest) {
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PairPOD pairLookup(const PairPOD *list, const size_t len, const int src, const int dest)
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{
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for (size_t i = 0; i < len; i++) {
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for (size_t i = 0; i < len; i++) {
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PairPOD pair = list[i];
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PairPOD pair = list[i];
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if ((src < 0 || pair.src_id == src) && (dest < 0 || pair.dest_id == dest)) {
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if ((src < 0 || pair.src_id == src) && (dest < 0 || pair.dest_id == dest)) {
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@ -315,6 +311,23 @@ PairPOD pairLookup(const PairPOD* list, const size_t len, const int src, const i
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return PairPOD();
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return PairPOD();
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}
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}
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bool destCompare (PairPOD i,PairPOD j) { return (i.dest_id<j.dest_id); }
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bool aliasCompare (GlobalAliasPOD i, GlobalAliasPOD j) {
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return (i.dest_row<j.dest_row) ||
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(i.dest_row==j.dest_row && i.dest_col<j.dest_col) ||
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(i.dest_row==j.dest_row && i.dest_col==j.dest_col && i.dest_id<j.dest_id);
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}
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const GlobalAliasPOD* aliasLookup(const GlobalAliasPOD *first, int len, const GlobalAliasPOD val)
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{
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auto res = std::lower_bound(first, first+len, val, aliasCompare);
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if (res-first != len && !aliasCompare(val, *res)) {
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return res;
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} else {
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return nullptr;
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}
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}
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Arch::Arch(ArchArgs args) : args(args)
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Arch::Arch(ArchArgs args) : args(args)
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{
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{
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family = "GW1N-1";
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family = "GW1N-1";
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@ -336,35 +349,37 @@ Arch::Arch(ArchArgs args) : args(args)
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IdString::initialize_add(this, db->id_strs[i].get(), uint32_t(i) + db->num_constids);
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IdString::initialize_add(this, db->id_strs[i].get(), uint32_t(i) + db->num_constids);
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}
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}
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// setup db
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// setup db
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char buf[32];
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for (int i = 0; i < db->rows * db->cols; i++) {
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for (int i = 0; i < db->rows * db->cols; i++) {
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int row = i / db->cols;
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int row = i / db->cols;
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int col = i % db->cols;
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int col = i % db->cols;
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const TilePOD *tile = db->grid[i].get();
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const TilePOD *tile = db->grid[i].get();
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// setup pips
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// setup wires
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for(unsigned int j=0; j < tile->num_pips; j++) {
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const PairPOD* pips[2] = { tile->pips.get(), tile->clock_pips.get()};
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const PairPOD pip = tile->pips[j];
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unsigned int num_pips[2] = { tile->num_pips, tile->num_clock_pips};
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IdString gdestname = wireToGlobal(row, col, db, pip.dest_id);
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for(int p = 0; p < 2; p++) {
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if(wires.count(gdestname) == 0) addWire(gdestname, pip.dest_id, col, row);
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for (unsigned int j = 0; j < num_pips[p]; j++) {
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IdString gsrcname = wireToGlobal(row, col, db, pip.src_id);
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const PairPOD pip = pips[p][j];
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if(wires.count(gsrcname) == 0) addWire(gsrcname, pip.src_id, col, row);
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int destrow = row;
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int destcol = col;
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IdString gdestname = wireToGlobal(destrow, destcol, db, pip.dest_id);
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if (wires.count(gdestname) == 0)
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addWire(gdestname, pip.dest_id, destcol, destrow);
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int srcrow = row;
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int srccol = col;
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IdString gsrcname = wireToGlobal(srcrow, srccol, db, pip.src_id);
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if (wires.count(gsrcname) == 0)
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addWire(gsrcname, pip.src_id, srccol, srcrow);
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}
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}
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for(unsigned int j=0; j < tile->num_clock_pips; j++) {
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const PairPOD pip = tile->clock_pips[j];
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IdString gdestname = wireToGlobal(row, col, db, pip.dest_id);
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if(wires.count(gdestname) == 0) addWire(gdestname, pip.dest_id, col, row);
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IdString gsrcname = wireToGlobal(row, col, db, pip.src_id);
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if(wires.count(gsrcname) == 0) addWire(gsrcname, pip.src_id, col, row);
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}
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}
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for (unsigned int j = 0; j < tile->num_bels; j++) {
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for (unsigned int j = 0; j < tile->num_bels; j++) {
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const BelsPOD *bel = &tile->bels[j];
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const BelsPOD *bel = &tile->bels[j];
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char buf[32];
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IdString belname;
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IdString belname;
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IdString wirename;
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IdString wirename;
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IdString portname;
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IdString portname;
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int z = 0;
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int z = 0;
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bool dff = true;
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bool dff = true;
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switch (static_cast<ConstIds>(bel->type_id))
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switch (static_cast<ConstIds>(bel->type_id)) {
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{
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// fall through the ++
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// fall through the ++
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case ID_LUT7:
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case ID_LUT7:
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z++;
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z++;
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@ -439,7 +454,7 @@ Arch::Arch(ArchArgs args) : args(args)
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snprintf(buf, 32, "R%dC%d_IOB%c", row + 1, col + 1, 'A' + z);
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snprintf(buf, 32, "R%dC%d_IOB%c", row + 1, col + 1, 'A' + z);
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belname = id(buf);
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belname = id(buf);
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addBel(belname, id_IOB, Loc(col, row, z), false);
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addBel(belname, id_IOB, Loc(col, row, z), false);
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portname = pairLookup(bel->ports.get(), bel->num_ports, -1, ID_I).src_id;
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portname = pairLookup(bel->ports.get(), bel->num_ports, -1, ID_O).src_id;
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
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wirename = id(buf);
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wirename = id(buf);
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addBelInput(belname, id_I, wirename);
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addBelInput(belname, id_I, wirename);
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@ -451,12 +466,51 @@ Arch::Arch(ArchArgs args) : args(args)
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
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snprintf(buf, 32, "R%dC%d_%s", row + 1, col + 1, portname.c_str(this));
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wirename = id(buf);
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wirename = id(buf);
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addBelInput(belname, id_OE, wirename);
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addBelInput(belname, id_OE, wirename);
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break;
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default:
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default:
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break;
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break;
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}
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}
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}
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}
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}
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}
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// setup pips
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for (int i = 0; i < db->rows * db->cols; i++) {
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int row = i / db->cols;
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int col = i % db->cols;
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const TilePOD *tile = db->grid[i].get();
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const PairPOD* pips[2] = { tile->pips.get(), tile->clock_pips.get()};
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unsigned int num_pips[2] = { tile->num_pips, tile->num_clock_pips};
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for(int p = 0; p < 2; p++) {
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for (unsigned int j = 0; j < num_pips[p]; j++) {
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const PairPOD pip = pips[p][j];
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int destrow = row;
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int destcol = col;
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IdString gdestname = wireToGlobal(destrow, destcol, db, pip.dest_id);
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int srcrow = row;
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int srccol = col;
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IdString gsrcname = wireToGlobal(srcrow, srccol, db, pip.src_id);
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snprintf(buf, 32, "R%dC%d_%s_%s", row + 1, col + 1, IdString(pip.src_id).c_str(this),
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IdString(pip.dest_id).c_str(this));
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IdString pipname = id(buf);
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DelayInfo delay;
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delay.delay = 0.1; // TODO
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uint16_t srcid = pip.src_id;
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GlobalAliasPOD alias;
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alias.dest_col = srccol;
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alias.dest_row = srcrow;
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alias.dest_id = srcid;
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auto alias_src = aliasLookup(db->aliases.get(), db->num_aliases, alias);
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if(alias_src!=nullptr) {
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srccol = alias_src->src_col;
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srcrow = alias_src->src_row;
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gsrcname = wireToGlobal(srcrow, srccol, db, alias_src->src_id);
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std::cout << buf << std::endl;
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}
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addPip(pipname, pip.dest_id, gsrcname, gdestname, delay, Loc(col, row, j));
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}
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}
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}
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// Dummy for empty decals
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// Dummy for empty decals
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decal_graphics[IdString()];
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decal_graphics[IdString()];
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}
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}
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@ -468,7 +522,6 @@ void IdString::initialize_arch(const BaseCtx *ctx)
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#undef X
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#undef X
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}
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}
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// ---------------------------------------------------------------
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// ---------------------------------------------------------------
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BelId Arch::getBelByName(IdString name) const
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BelId Arch::getBelByName(IdString name) const
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@ -34,6 +34,8 @@ template <typename T> struct RelPtr
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const T *get() const { return reinterpret_cast<const T *>(reinterpret_cast<const char *>(this) + offset); }
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const T *get() const { return reinterpret_cast<const T *>(reinterpret_cast<const char *>(this) + offset); }
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T *get_mut() const { return const_cast<T *>(reinterpret_cast<const T *>(reinterpret_cast<const char *>(this) + offset)); }
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const T &operator[](size_t index) const { return get()[index]; }
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const T &operator[](size_t index) const { return get()[index]; }
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const T &operator*() const { return *(get()); }
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const T &operator*() const { return *(get()); }
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@ -240,7 +242,7 @@ struct Arch : BaseCtx
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void addCellTimingSetupHold(IdString cell, IdString port, IdString clock, DelayInfo setup, DelayInfo hold);
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void addCellTimingSetupHold(IdString cell, IdString port, IdString clock, DelayInfo setup, DelayInfo hold);
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void addCellTimingClockToOut(IdString cell, IdString port, IdString clock, DelayInfo clktoq);
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void addCellTimingClockToOut(IdString cell, IdString port, IdString clock, DelayInfo clktoq);
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IdString wireToGlobal(int row, int col, const DatabasePOD* db, IdString wire);
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IdString wireToGlobal(int &row, int &col, const DatabasePOD* db, IdString wire);
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// ---------------------------------------------------------------
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// ---------------------------------------------------------------
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// Common Arch API. Every arch must provide the following methods.
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// Common Arch API. Every arch must provide the following methods.
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