Himbaechel xilinx : Fix packing of cascaded DSP
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@ -77,22 +77,16 @@ unsigned XC7Packer::walk_dsp(CellInfo *root, CellInfo *current_cell, int constr_
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if (cascaded_cell != nullptr) {
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if (cascaded_cell != nullptr) {
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auto is_lower_bel = constr_z == BEL_LOWER_DSP;
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auto is_lower_bel = constr_z == BEL_LOWER_DSP;
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// Creating placement clusters is currently disabled, because the current constraints
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// on Y coordinates don't always correspond to placement possibilities, which makes placer crash
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// Explanation : the current offset +/-5 applies to DSP tiles, not to DSP slices
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// But two cascaded DSPs can be placed in one tile, which does not correspond to a +/-5 offset
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#if 0
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cascaded_cell->cluster = root->name;
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cascaded_cell->cluster = root->name;
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root->constr_children.push_back(cascaded_cell);
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root->constr_children.push_back(cascaded_cell);
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cascaded_cell->constr_x = 0;
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cascaded_cell->constr_x = 0;
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// the connected cell has to be above the current cell,
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// The connected cell has to be above the current cell,
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// otherwise it cannot be routed, because the cascading ports
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// otherwise it cannot be routed, because the cascading ports
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// are only connected to the DSP above
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// are only connected to the DSP above
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auto previous_y = (current_cell == root) ? 0 : current_cell->constr_y;
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auto previous_y = (current_cell == root) ? 0 : current_cell->constr_y;
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cascaded_cell->constr_y = previous_y + (is_lower_bel ? -5 : 0);
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cascaded_cell->constr_y = previous_y + (is_lower_bel ? -5 : 0);
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cascaded_cell->constr_z = constr_z;
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cascaded_cell->constr_z = constr_z;
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cascaded_cell->constr_abs_z = true;
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cascaded_cell->constr_abs_z = true;
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#endif
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num_casc += 1;
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num_casc += 1;
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num_casc += walk_dsp(root, cascaded_cell, is_lower_bel ? BEL_UPPER_DSP : BEL_LOWER_DSP);
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num_casc += walk_dsp(root, cascaded_cell, is_lower_bel ? BEL_UPPER_DSP : BEL_LOWER_DSP);
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@ -187,11 +181,14 @@ void XC7Packer::pack_dsps()
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for (auto root : dsp_roots) {
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for (auto root : dsp_roots) {
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root->constr_abs_z = true;
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root->constr_abs_z = true;
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root->constr_z = BEL_LOWER_DSP;
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root->constr_z = BEL_LOWER_DSP;
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num_casc += walk_dsp(root, root, BEL_UPPER_DSP);
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unsigned loc_casc = walk_dsp(root, root, BEL_UPPER_DSP);
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if(loc_casc > 0) {
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root->cluster = root->name;
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}
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num_casc += loc_casc;
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}
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}
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if(num_casc > 0) {
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if(num_casc > 0) {
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log_info("Found %u cascaded DSP from %u roots\n", num_casc, (unsigned)dsp_roots.size());
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log_info("Found %u cascaded DSP from %u roots\n", num_casc, (unsigned)dsp_roots.size());
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log_nonfatal_error("Cascaded DSP are currently not supported by the placer, the design will probably not be functional\n");
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}
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}
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}
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}
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