Fix Ui/Decal handling of active/inactive arch objects
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
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e9668ed618
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45462ef3a7
@ -181,6 +181,7 @@ void Arch::bindBel(BelId bel, IdString cell, PlaceStrength strength)
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bels.at(bel).bound_cell = cell;
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bels.at(bel).bound_cell = cell;
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cells.at(cell)->bel = bel;
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cells.at(cell)->bel = bel;
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cells.at(cell)->belStrength = strength;
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cells.at(cell)->belStrength = strength;
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refreshUiBel(bel);
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}
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}
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void Arch::unbindBel(BelId bel)
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void Arch::unbindBel(BelId bel)
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@ -188,6 +189,7 @@ void Arch::unbindBel(BelId bel)
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cells.at(bels.at(bel).bound_cell)->bel = BelId();
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cells.at(bels.at(bel).bound_cell)->bel = BelId();
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cells.at(bels.at(bel).bound_cell)->belStrength = STRENGTH_NONE;
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cells.at(bels.at(bel).bound_cell)->belStrength = STRENGTH_NONE;
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bels.at(bel).bound_cell = IdString();
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bels.at(bel).bound_cell = IdString();
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refreshUiBel(bel);
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}
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}
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bool Arch::checkBelAvail(BelId bel) const { return bels.at(bel).bound_cell == IdString(); }
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bool Arch::checkBelAvail(BelId bel) const { return bels.at(bel).bound_cell == IdString(); }
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@ -236,6 +238,7 @@ void Arch::bindWire(WireId wire, IdString net, PlaceStrength strength)
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wires.at(wire).bound_net = net;
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wires.at(wire).bound_net = net;
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nets.at(net)->wires[wire].pip = PipId();
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nets.at(net)->wires[wire].pip = PipId();
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nets.at(net)->wires[wire].strength = strength;
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nets.at(net)->wires[wire].strength = strength;
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refreshUiWire(wire);
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}
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}
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void Arch::unbindWire(WireId wire)
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void Arch::unbindWire(WireId wire)
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@ -243,11 +246,14 @@ void Arch::unbindWire(WireId wire)
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auto &net_wires = nets[wires.at(wire).bound_net]->wires;
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auto &net_wires = nets[wires.at(wire).bound_net]->wires;
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auto pip = net_wires.at(wire).pip;
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auto pip = net_wires.at(wire).pip;
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if (pip != PipId())
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if (pip != PipId()) {
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pips.at(pip).bound_net = IdString();
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pips.at(pip).bound_net = IdString();
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refreshUiPip(pip);
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}
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net_wires.erase(wire);
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net_wires.erase(wire);
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wires.at(wire).bound_net = IdString();
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wires.at(wire).bound_net = IdString();
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refreshUiWire(wire);
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}
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}
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bool Arch::checkWireAvail(WireId wire) const { return wires.at(wire).bound_net == IdString(); }
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bool Arch::checkWireAvail(WireId wire) const { return wires.at(wire).bound_net == IdString(); }
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@ -282,6 +288,8 @@ void Arch::bindPip(PipId pip, IdString net, PlaceStrength strength)
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wires.at(wire).bound_net = net;
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wires.at(wire).bound_net = net;
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nets.at(net)->wires[wire].pip = pip;
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nets.at(net)->wires[wire].pip = pip;
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nets.at(net)->wires[wire].strength = strength;
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nets.at(net)->wires[wire].strength = strength;
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refreshUiPip(pip);
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refreshUiWire(wire);
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}
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}
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void Arch::unbindPip(PipId pip)
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void Arch::unbindPip(PipId pip)
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@ -290,6 +298,8 @@ void Arch::unbindPip(PipId pip)
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nets.at(wires.at(wire).bound_net)->wires.erase(wire);
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nets.at(wires.at(wire).bound_net)->wires.erase(wire);
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pips.at(pip).bound_net = IdString();
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pips.at(pip).bound_net = IdString();
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wires.at(wire).bound_net = IdString();
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wires.at(wire).bound_net = IdString();
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refreshUiPip(pip);
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refreshUiWire(wire);
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}
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}
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bool Arch::checkPipAvail(PipId pip) const { return pips.at(pip).bound_net == IdString(); }
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bool Arch::checkPipAvail(PipId pip) const { return pips.at(pip).bound_net == IdString(); }
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@ -455,6 +455,7 @@ DecalXY Arch::getFrameDecal() const
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{
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{
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_FRAME;
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decalxy.decal.type = DecalId::TYPE_FRAME;
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decalxy.decal.active = true;
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return decalxy;
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return decalxy;
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}
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}
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@ -463,6 +464,7 @@ DecalXY Arch::getBelDecal(BelId bel) const
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_BEL;
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decalxy.decal.type = DecalId::TYPE_BEL;
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decalxy.decal.index = bel.index;
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decalxy.decal.index = bel.index;
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decalxy.decal.active = bel_to_cell.at(bel.index) != IdString();
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return decalxy;
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return decalxy;
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}
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}
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@ -471,18 +473,25 @@ DecalXY Arch::getWireDecal(WireId wire) const
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_WIRE;
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decalxy.decal.type = DecalId::TYPE_WIRE;
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decalxy.decal.index = wire.index;
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decalxy.decal.index = wire.index;
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decalxy.decal.active = wire_to_net.at(wire.index) != IdString();
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return decalxy;
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return decalxy;
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}
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}
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DecalXY Arch::getPipDecal(PipId pip) const
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DecalXY Arch::getPipDecal(PipId pip) const
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{
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{
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_PIP;
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decalxy.decal.index = pip.index;
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decalxy.decal.active = pip_to_net.at(pip.index) != IdString();
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return decalxy;
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return decalxy;
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};
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};
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DecalXY Arch::getGroupDecal(GroupId group) const
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DecalXY Arch::getGroupDecal(GroupId group) const
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{
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{
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DecalXY decalxy;
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DecalXY decalxy;
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decalxy.decal.type = DecalId::TYPE_GROUP;
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decalxy.decal.index = (group.type << 16) | (group.x << 8) | (group.y);
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decalxy.decal.active = true;
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return decalxy;
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return decalxy;
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};
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};
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@ -509,8 +518,7 @@ std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
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int n = chip_info->wire_data[wire.index].num_segments;
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int n = chip_info->wire_data[wire.index].num_segments;
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const WireSegmentPOD *p = chip_info->wire_data[wire.index].segments.get();
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const WireSegmentPOD *p = chip_info->wire_data[wire.index].segments.get();
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GraphicElement::style_t style =
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GraphicElement::style_t style = decal.active ? GraphicElement::G_ACTIVE : GraphicElement::G_INACTIVE;
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wire_to_net.at(wire.index) != IdString() ? GraphicElement::G_ACTIVE : GraphicElement::G_INACTIVE;
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for (int i = 0; i < n; i++)
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for (int i = 0; i < n; i++)
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gfxTileWire(ret, p[i].x, p[i].y, GfxTileWireId(p[i].index), style);
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gfxTileWire(ret, p[i].x, p[i].y, GfxTileWireId(p[i].index), style);
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@ -525,7 +533,7 @@ std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
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if (bel_type == TYPE_ICESTORM_LC) {
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if (bel_type == TYPE_ICESTORM_LC) {
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GraphicElement el;
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GraphicElement el;
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el.type = GraphicElement::G_BOX;
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el.type = GraphicElement::G_BOX;
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el.style = bel_to_cell.at(bel.index) != IdString() ? GraphicElement::G_ACTIVE : GraphicElement::G_INACTIVE;
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el.style = decal.active ? GraphicElement::G_ACTIVE : GraphicElement::G_INACTIVE;
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el.x1 = chip_info->bel_data[bel.index].x + logic_cell_x1;
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el.x1 = chip_info->bel_data[bel.index].x + logic_cell_x1;
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el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
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el.x2 = chip_info->bel_data[bel.index].x + logic_cell_x2;
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el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 +
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el.y1 = chip_info->bel_data[bel.index].y + logic_cell_y1 +
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11
ice40/arch.h
11
ice40/arch.h
@ -371,6 +371,7 @@ struct Arch : BaseCtx
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bel_to_cell[bel.index] = cell;
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bel_to_cell[bel.index] = cell;
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cells[cell]->bel = bel;
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cells[cell]->bel = bel;
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cells[cell]->belStrength = strength;
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cells[cell]->belStrength = strength;
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refreshUiBel(bel);
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}
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}
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void unbindBel(BelId bel)
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void unbindBel(BelId bel)
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@ -380,6 +381,7 @@ struct Arch : BaseCtx
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cells[bel_to_cell[bel.index]]->bel = BelId();
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cells[bel_to_cell[bel.index]]->bel = BelId();
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cells[bel_to_cell[bel.index]]->belStrength = STRENGTH_NONE;
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cells[bel_to_cell[bel.index]]->belStrength = STRENGTH_NONE;
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bel_to_cell[bel.index] = IdString();
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bel_to_cell[bel.index] = IdString();
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refreshUiBel(bel);
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}
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}
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bool checkBelAvail(BelId bel) const
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bool checkBelAvail(BelId bel) const
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@ -473,6 +475,7 @@ struct Arch : BaseCtx
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wire_to_net[wire.index] = net;
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wire_to_net[wire.index] = net;
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nets[net]->wires[wire].pip = PipId();
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nets[net]->wires[wire].pip = PipId();
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nets[net]->wires[wire].strength = strength;
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nets[net]->wires[wire].strength = strength;
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refreshUiWire(wire);
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}
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}
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void unbindWire(WireId wire)
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void unbindWire(WireId wire)
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@ -488,10 +491,12 @@ struct Arch : BaseCtx
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if (pip != PipId()) {
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if (pip != PipId()) {
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pip_to_net[pip.index] = IdString();
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pip_to_net[pip.index] = IdString();
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switches_locked[chip_info->pip_data[pip.index].switch_index] = IdString();
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switches_locked[chip_info->pip_data[pip.index].switch_index] = IdString();
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refreshUiPip(pip);
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}
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}
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net_wires.erase(it);
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net_wires.erase(it);
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wire_to_net[wire.index] = IdString();
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wire_to_net[wire.index] = IdString();
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refreshUiWire(wire);
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}
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}
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bool checkWireAvail(WireId wire) const
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bool checkWireAvail(WireId wire) const
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@ -542,6 +547,9 @@ struct Arch : BaseCtx
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wire_to_net[dst.index] = net;
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wire_to_net[dst.index] = net;
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nets[net]->wires[dst].pip = pip;
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nets[net]->wires[dst].pip = pip;
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nets[net]->wires[dst].strength = strength;
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nets[net]->wires[dst].strength = strength;
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refreshUiPip(pip);
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refreshUiWire(dst);
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}
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}
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void unbindPip(PipId pip)
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void unbindPip(PipId pip)
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@ -558,6 +566,9 @@ struct Arch : BaseCtx
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pip_to_net[pip.index] = IdString();
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pip_to_net[pip.index] = IdString();
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switches_locked[chip_info->pip_data[pip.index].switch_index] = IdString();
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switches_locked[chip_info->pip_data[pip.index].switch_index] = IdString();
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refreshUiPip(pip);
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refreshUiWire(dst);
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}
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}
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bool checkPipAvail(PipId pip) const
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bool checkPipAvail(PipId pip) const
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@ -144,6 +144,7 @@ struct DecalId
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TYPE_GROUP
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TYPE_GROUP
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} type = TYPE_NONE;
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} type = TYPE_NONE;
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int32_t index = -1;
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int32_t index = -1;
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bool active = false;
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bool operator==(const DecalId &other) const { return (type == other.type) && (index == other.index); }
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bool operator==(const DecalId &other) const { return (type == other.type) && (index == other.index); }
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bool operator!=(const DecalId &other) const { return (type != other.type) || (index != other.index); }
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bool operator!=(const DecalId &other) const { return (type != other.type) || (index != other.index); }
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