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ecp5: More optimal LUT6 placement

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Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2018-11-16 17:36:34 +00:00
parent 3ae8b86003
commit 458aa20161
3 changed files with 11 additions and 1 deletions
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6
ecp5/arch_place.cc
View File

@ -75,6 +75,8 @@ bool Arch::isBelLocationValid(BelId bel) const
bel_cells.push_back(cell_other);
}
}
if (getBoundBelCell(bel) != nullptr && getBoundBelCell(bel)->sliceInfo.has_l6mux && ((bel_loc.z % 2) == 1))
return false;
return slicesCompatible(bel_cells);
} else {
CellInfo *cell = getBoundBelCell(bel);
@ -92,6 +94,10 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const
std::vector<const CellInfo *> bel_cells;
Loc bel_loc = getBelLocation(bel);
if (cell->sliceInfo.has_l6mux && ((bel_loc.z % 2) == 1))
return false;
for (auto bel_other : getBelsByTile(bel_loc.x, bel_loc.y)) {
CellInfo *cell_other = getBoundBelCell(bel_other);
if (cell_other != nullptr && bel_other != bel) {

1
ecp5/archdefs.h
View File

@ -158,6 +158,7 @@ struct ArchCellInfo
struct
{
bool using_dff;
bool has_l6mux;
IdString clk_sig, lsr_sig, clkmux, lsrmux, srmode;
} sliceInfo;
};

5
ecp5/pack.cc
View File

@ -435,7 +435,6 @@ class Ecp5Packer
replace_port(ci, ctx->id("SD"), slice1, id_M1);
replace_port(ci, ctx->id("Z"), slice1, id_OFX1);
slice0->constr_z = 1;
slice0->constr_abs_z = true;
slice0->constr_x = 0;
slice0->constr_y = 0;
slice0->constr_parent = slice1;
@ -1294,6 +1293,10 @@ void Arch::assignArchInfo()
ci->sliceInfo.clkmux = id(str_or_default(ci->params, id_CLKMUX, "CLK"));
ci->sliceInfo.lsrmux = id(str_or_default(ci->params, id_LSRMUX, "LSR"));
ci->sliceInfo.srmode = id(str_or_default(ci->params, id_SRMODE, "LSR_OVER_CE"));
ci->sliceInfo.has_l6mux = false;
if (ci->ports.count(id_FXA) && ci->ports[id_FXA].net != nullptr &&
ci->ports[id_FXA].net->driver.port == id_OFX0)
ci->sliceInfo.has_l6mux = true;
}
}
}