nexus: Rework how constant pins work
Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah
parent
acb4cf9ead
commit
46536773f4
41
nexus/arch.h
41
nexus/arch.h
@ -754,6 +754,36 @@ struct WireBelPinRange
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// -----------------------------------------------------------------------
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// This enum captures different 'styles' of cell pins
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// This is a combination of the modes available for a pin (tied high, low or inverted)
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// and the default value to set it to not connected
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enum CellPinStyle
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{
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PINOPT_NONE = 0x0, // no options, just signal as-is
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PINOPT_HI = 0x1, // can be tied low
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PINOPT_LO = 0x2, // can be tied high
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PINOPT_INV = 0x4, // can be inverted
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PINOPT_LOHI = 0x3, // can be tied low or high
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PINOPT_LOHIINV = 0x7, // can be tied low or high; or inverted
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PINDEF_NONE = 0x00, // leave disconnected
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PINDEF_0 = 0x10, // connect to 0 if not used
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PINDEF_1 = 0x20, // connect to 1 if not used
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PINSTYLE_CIB = 0x11, // 'CIB' signal, floats high but explicitly zeroed if not used
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PINSTYLE_CLK = 0x07, // CLK type signal, invertible and defaults to disconnected
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PINSTYLE_CE = 0x27, // CE type signal, invertible and defaults to enabled
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PINSTYLE_LSR = 0x17, // LSR type signal, invertible and defaults to not reset
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PINSTYLE_DEDI = 0x00, // dedicated signals, leave alone
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PINSTYLE_PU = 0x21, // signals that float high and default high
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PINSTYLE_INV_PD = 0x17, // invertible, pull down by default
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PINSTYLE_INV_PU = 0x27, // invertible, pull up by default
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};
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// -----------------------------------------------------------------------
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const int bba_version =
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#include "bba_version.inc"
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;
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@ -1308,14 +1338,9 @@ struct Arch : BaseCtx
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// -------------------------------------------------
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// Get a map cell type -> pins that can be inverted
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void get_invertible_pins(std::unordered_map<IdString, std::unordered_set<IdString>> &pins) const;
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// Get a map cell -> pin -> value _it takes_ if disconnected
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void get_pins_floating_value(std::unordered_map<IdString, std::unordered_map<IdString, bool>> &pins) const;
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// Get a map cell -> pin -> value _it must be connected to_ if disconnected
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// Default value for all pins, if not specified is 0
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void
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get_pins_default_value(std::unordered_map<IdString, std::unordered_map<IdString, Property::State>> &pins) const;
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typedef std::unordered_map<IdString, CellPinStyle> CellPinsData;
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void get_cell_pin_data(std::unordered_map<IdString, CellPinsData> &cell_pins);
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// -------------------------------------------------
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@ -110,5 +110,26 @@ X(OSC_CORE)
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X(HFCLKOUT)
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X(LFCLKOUT)
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X(HF_CLK_DIV)
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X(HFOUTEN)
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X(OXIDE_EBR)
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X(CLKA)
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X(CLKB)
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X(CEA)
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X(CEB)
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X(CSA0)
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X(CSA1)
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X(CSA2)
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X(CSB0)
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X(CSB1)
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X(CSB2)
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X(ADA0)
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X(ADA1)
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X(ADA2)
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X(ADA3)
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X(ADB0)
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X(ADB1)
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X(WEA)
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X(WEB)
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X(RSTA)
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X(RSTB)
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@ -22,32 +22,58 @@
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NEXTPNR_NAMESPACE_BEGIN
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void Arch::get_invertible_pins(std::unordered_map<IdString, std::unordered_set<IdString>> &pins) const
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{
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pins[id_OXIDE_FF] = {id_CLK, id_LSR, id_CE};
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pins[id_RAMW] = {id_WCK};
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pins[id_SEIO18_CORE] = {id_T};
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pins[id_SEIO33_CORE] = {id_T};
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}
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namespace {
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void Arch::get_pins_floating_value(std::unordered_map<IdString, std::unordered_map<IdString, bool>> &pins) const
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{
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pins[id_OXIDE_COMB] = {{id_A, true}, {id_B, true}, {id_C, true}, {id_D, true}, {id_SEL, true}};
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pins[id_OXIDE_FF] = {{id_CLK, false}, {id_LSR, true}, {id_CE, true}};
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pins[id_SEIO18_CORE] = {{id_T, true}};
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pins[id_SEIO33_CORE] = {{id_T, true}};
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}
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static const std::unordered_map<IdString, Arch::CellPinsData> base_cell_pin_data = {
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{id_OXIDE_COMB,
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{
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{id_WCK, PINSTYLE_DEDI},
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{id_WRE, PINSTYLE_DEDI},
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void Arch::get_pins_default_value(
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std::unordered_map<IdString, std::unordered_map<IdString, Property::State>> &pins) const
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{
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pins[id_OXIDE_COMB] = {{id_A, Property::S1}, {id_B, Property::S1}, {id_C, Property::S1},
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{id_D, Property::S1}, {id_SEL, Property::S1}, {id_WAD0, Property::Sx},
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{id_WAD1, Property::Sx}, {id_WAD2, Property::Sx}, {id_WAD3, Property::Sx},
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{id_WCK, Property::Sx}, {id_WRE, Property::Sx}, {id_WD, Property::Sx}};
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pins[id_OXIDE_FF] = {{id_CE, Property::S1}, {id_DI, Property::Sx}};
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pins[id_SEIO18_CORE] = {{id_T, Property::S1}};
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pins[id_SEIO33_CORE] = {{id_T, Property::S1}};
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}
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{id_FCI, PINSTYLE_DEDI},
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{id_WAD0, PINSTYLE_DEDI},
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{id_WAD1, PINSTYLE_DEDI},
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{id_WAD2, PINSTYLE_DEDI},
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{id_WAD3, PINSTYLE_DEDI},
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{id_WD, PINSTYLE_DEDI},
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NEXTPNR_NAMESPACE_END
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{{}, PINSTYLE_PU},
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}},
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{id_OXIDE_FF,
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{
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{id_CLK, PINSTYLE_CLK},
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{id_LSR, PINSTYLE_LSR},
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{id_CE, PINSTYLE_CE},
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{{}, PINSTYLE_DEDI},
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}},
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{id_SEIO18_CORE,
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{
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{id_T, PINSTYLE_CE},
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{id_B, PINSTYLE_DEDI},
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{{}, PINSTYLE_INV_PU},
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}},
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{id_SEIO33_CORE,
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{
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{id_T, PINSTYLE_CE},
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{id_B, PINSTYLE_DEDI},
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{{}, PINSTYLE_INV_PU},
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}},
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{id_OXIDE_EBR, {{id_CLKA, PINSTYLE_CLK}, {id_CLKB, PINSTYLE_CLK}, {id_CEA, PINSTYLE_CE},
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{id_CEB, PINSTYLE_CE}, {id_CSA0, PINSTYLE_PU}, {id_CSA1, PINSTYLE_PU},
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{id_CSA2, PINSTYLE_PU}, {id_CSB0, PINSTYLE_PU}, {id_CSB1, PINSTYLE_PU},
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{id_CSB2, PINSTYLE_PU}, {id_ADA0, PINSTYLE_INV_PD}, {id_ADA1, PINSTYLE_INV_PD},
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{id_ADA2, PINSTYLE_INV_PD}, {id_ADA2, PINSTYLE_INV_PD}, {id_ADA3, PINSTYLE_INV_PD},
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{id_ADB0, PINSTYLE_INV_PD}, {id_ADB1, PINSTYLE_INV_PD}, {id_WEA, PINSTYLE_INV_PD},
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{id_WEB, PINSTYLE_INV_PD}, {id_RSTA, PINSTYLE_INV_PD}, {id_RSTB, PINSTYLE_INV_PD},
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{{}, PINSTYLE_CIB}}},
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{id_OSC_CORE,
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{
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{id_HFOUTEN, PINSTYLE_PU},
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{{}, PINSTYLE_CIB},
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}},
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};
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} // namespace
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void Arch::get_cell_pin_data(std::unordered_map<IdString, CellPinsData> &cell_pins) { cell_pins = base_cell_pin_data; }
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NEXTPNR_NAMESPACE_END
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