machxo2: Fix packing when FF is driven by a constant; UART test core working on silicon, fails post-synth sim.

This commit is contained in:
William D. Jones 2021-02-07 22:06:23 -05:00 committed by gatecat
parent 086bca18b8
commit 4948e8d914
2 changed files with 3 additions and 1 deletions

View File

@ -166,7 +166,7 @@ void dff_to_lc(Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_lut)
// If a register's DI port is fed by a constant, options for placing are // If a register's DI port is fed by a constant, options for placing are
// limited. Use the LUT to get around this. // limited. Use the LUT to get around this.
if(pass_thru_lut) { if(pass_thru_lut) {
lc->params[ctx->id("LUT0_INITVAL")] = 0xAAAA; lc->params[ctx->id("LUT0_INITVAL")] = Property(0xAAAA, 16);;
replace_port(dff, ctx->id("DI"), lc, ctx->id("A0")); replace_port(dff, ctx->id("DI"), lc, ctx->id("A0"));
connect_ports(ctx, lc, ctx->id("F0"), lc, ctx->id("DI0")); connect_ports(ctx, lc, ctx->id("F0"), lc, ctx->id("DI0"));
} else { } else {

View File

@ -142,6 +142,8 @@ static void set_net_constant(Context *ctx, NetInfo *orig, NetInfo *constnet, boo
log_info("FACADE_FF %s is driven by a constant\n", uc->name.c_str(ctx)); log_info("FACADE_FF %s is driven by a constant\n", uc->name.c_str(ctx));
std::unique_ptr<CellInfo> lc = create_machxo2_cell(ctx, id_FACADE_SLICE, uc->name.str(ctx) + "_CONST"); std::unique_ptr<CellInfo> lc = create_machxo2_cell(ctx, id_FACADE_SLICE, uc->name.str(ctx) + "_CONST");
std::copy(uc->attrs.begin(), uc->attrs.end(), std::inserter(lc->attrs, lc->attrs.begin()));
dff_to_lc(ctx, uc, lc.get(), true); dff_to_lc(ctx, uc, lc.get(), true);
packed_cells.insert(uc->name); packed_cells.insert(uc->name);