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ecp5: Add TSHX2DQSA support

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Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2019-02-13 09:37:47 +00:00 committed by David Shah
parent 82ad10a395
commit 49e9453820
1 changed files with 5 additions and 4 deletions
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9
ecp5/pack.cc
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@ -1887,10 +1887,10 @@ class Ecp5Packer
process_dqs_port(ci, pio, iol, id_WRPNTR1); process_dqs_port(ci, pio, iol, id_WRPNTR1);
process_dqs_port(ci, pio, iol, id_WRPNTR0); process_dqs_port(ci, pio, iol, id_WRPNTR0);
packed_cells.insert(cell.first); packed_cells.insert(cell.first);
} else if (ci->type == ctx->id("TSHX2DQA")) { } else if (ci->type == ctx->id("TSHX2DQA") || ci->type == ctx->id("TSHX2DQSA")) {
CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_T, true); CellInfo *pio = net_only_drives(ctx, ci->ports.at(ctx->id("Q")).net, is_trellis_io, id_T, true);
if (pio == nullptr) if (pio == nullptr)
log_error("TSHX2DQA '%s' Q output must be connected only to a top level tristate\n", log_error("%s '%s' Q output must be connected only to a top level tristate\n", ci->type.c_str(ctx),
ci->name.c_str(ctx)); ci->name.c_str(ctx));
CellInfo *iol; CellInfo *iol;
if (pio_iologic.count(pio->name)) if (pio_iologic.count(pio->name))
@ -1909,10 +1909,11 @@ class Ecp5Packer
set_iologic_lsr(iol, ci, ctx->id("RST"), false); set_iologic_lsr(iol, ci, ctx->id("RST"), false);
replace_port(ci, ctx->id("T0"), iol, id_TSDATA0); replace_port(ci, ctx->id("T0"), iol, id_TSDATA0);
replace_port(ci, ctx->id("T1"), iol, id_TSDATA1); replace_port(ci, ctx->id("T1"), iol, id_TSDATA1);
process_dqs_port(ci, pio, iol, id_DQSW270); process_dqs_port(ci, pio, iol, ci->type == ctx->id("TSHX2DQSA") ? id_DQSW : id_DQSW270);
iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED"); iol->params[ctx->id("GSR")] = str_or_default(ci->params, ctx->id("GSR"), "DISABLED");
iol->params[ctx->id("MTDDRX.MODE")] = "MTSHX2"; iol->params[ctx->id("MTDDRX.MODE")] = "MTSHX2";
iol->params[ctx->id("MIDDRX_MODDRX.WRCLKMUX")] = "DQSW270"; iol->params[ctx->id("MTDDRX.DQSW_INVERT")] = ci->type == ctx->id("TSHX2DQSA") ? "ENABLED" : "DISABLED";
iol->params[ctx->id("MIDDRX_MODDRX.WRCLKMUX")] = ci->type == ctx->id("TSHX2DQSA") ? "DQSW" : "DQSW270";
iol->params[ctx->id("IOLTOMUX")] = "TDDR"; iol->params[ctx->id("IOLTOMUX")] = "TDDR";
packed_cells.insert(cell.first); packed_cells.insert(cell.first);
} }