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chipdb.py style fix

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This commit is contained in:
Sergiusz Bazanski 2018-06-20 20:28:48 +01:00
parent 71121b439b
commit 4e480a9a61
1 changed files with 1 additions and 1 deletions
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2
ice40/chipdb.py
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@ -37,7 +37,7 @@ wire_names_r = dict()
wire_xy = dict()
num_tile_types = 5
tile_sizes = {_: (0, 0) for _ in range(num_tile_types)}
tile_sizes = {i: (0, 0) for i in range(num_tile_types)}
tile_bits = [[] for _ in range(num_tile_types)]
cbit_re = re.compile(r'B(\d+)\[(\d+)\]')