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ecp5: Fix global clock routing with multiclock DPRAM

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Signed-off-by: David Shah <dave@ds0.me>
This commit is contained in:
David Shah 2019-02-25 10:54:24 +00:00
parent 55b0b60d9d
commit 4ec2bd1e5d
2 changed files with 18 additions and 10 deletions
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9
ecp5/arch.cc
View File

@ -459,7 +459,8 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
auto src_loc = est_location(src), dst_loc = est_location(dst); auto src_loc = est_location(src), dst_loc = est_location(dst);
int dx = abs(src_loc.first - dst_loc.first), dy = abs(src_loc.second - dst_loc.second); int dx = abs(src_loc.first - dst_loc.first), dy = abs(src_loc.second - dst_loc.second);
return (130 - 13 * args.speed) * (4 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5))); return (130 - 13 * args.speed) *
(4 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5)));
} }
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
@ -471,10 +472,12 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
auto sink_loc = getBelLocation(sink.cell->bel); auto sink_loc = getBelLocation(sink.cell->bel);
int dx = abs(driver_loc.x - sink_loc.x), dy = abs(driver_loc.y - sink_loc.y); int dx = abs(driver_loc.x - sink_loc.x), dy = abs(driver_loc.y - sink_loc.y);
return (130 - 13 * args.speed) * (4 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5))); return (130 - 13 * args.speed) *
(4 + std::max(dx - 5, 0) + std::max(dy - 5, 0) + 2 * (std::min(dx, 5) + std::min(dy, 5)));
} }
bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const { bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t &budget) const
{
if (net_info->driver.port == id_FCO && sink.port == id_FCI) { if (net_info->driver.port == id_FCO && sink.port == id_FCI) {
budget = 0; budget = 0;
return true; return true;

19
ecp5/globals.cc
View File

@ -448,6 +448,8 @@ class Ecp5GlobalRouter
if (i < 8) if (i < 8)
fab_globals.insert(i); fab_globals.insert(i);
} }
std::vector<std::pair<PortRef *, int>> toroute;
std::unordered_map<int, NetInfo *> clocks;
for (auto cell : sorted(ctx->cells)) { for (auto cell : sorted(ctx->cells)) {
CellInfo *ci = cell.second; CellInfo *ci = cell.second;
if (ci->type == id_DCCA) { if (ci->type == id_DCCA) {
@ -472,14 +474,17 @@ class Ecp5GlobalRouter
NPNR_ASSERT(routed); NPNR_ASSERT(routed);
// WCK must have routing priority // WCK must have routing priority
auto sorted_users = clock->users; for (auto &user : clock->users)
std::sort(sorted_users.begin(), sorted_users.end(), [this](const PortRef &a, const PortRef &b) { toroute.emplace_back(&user, glbid);
return global_route_priority(a) < global_route_priority(b); clocks[glbid] = clock;
}
}
std::sort(toroute.begin(), toroute.end(),
[this](const std::pair<PortRef *, int> &a, const std::pair<PortRef *, int> &b) {
return global_route_priority(*a.first) < global_route_priority(*b.first);
}); });
for (const auto &user : sorted_users) { for (const auto &user : toroute) {
route_logic_tile_global(clock, glbid, user); route_logic_tile_global(clocks.at(user.second), user.second, *user.first);
}
}
} }
} }
}; };