Start making use of getBelPinsForCellPin API
This replaces getNetinfoSinkWire with 3 new functions for different use cases. At the moment all existing code has been moved to getNetinfoSinkWire with phys_idx=0 so the build doesn't break; but this won't yet function properly with more than one sink. But it provides a base on which to work on refactoring the routers to support this case. Signed-off-by: gatecat <gatecat@ds0.me>
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gatecat
parent
85bb108ba4
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535723f414
@ -354,19 +354,59 @@ WireId Context::getNetinfoSourceWire(const NetInfo *net_info) const
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if (src_bel == BelId())
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return WireId();
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IdString driver_port = net_info->driver.port;
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return getBelPinWire(src_bel, driver_port);
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auto bel_pins = getBelPinsForCellPin(net_info->driver.cell, net_info->driver.port);
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auto iter = bel_pins.begin();
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if (iter == bel_pins.end())
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return WireId();
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WireId driver = getBelPinWire(src_bel, *iter);
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++iter;
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NPNR_ASSERT(iter == bel_pins.end()); // assert there is only one driver bel pin;
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return driver;
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}
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WireId Context::getNetinfoSinkWire(const NetInfo *net_info, const PortRef &user_info) const
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SSOArray<WireId, 2> Context::getNetinfoSinkWires(const NetInfo *net_info, const PortRef &user_info) const
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{
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auto dst_bel = user_info.cell->bel;
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if (dst_bel == BelId())
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return WireId();
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return SSOArray<WireId, 2>(0, WireId());
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size_t bel_pin_count = 0;
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// We use an SSOArray here because it avoids any heap allocation for the 99.9% case of 1 or 2 sink wires
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// but as SSOArray doesn't (currently) support resizing to keep things simple it does mean we have to do
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// two loops
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for (auto s : getBelPinsForCellPin(user_info.cell, user_info.port)) {
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(void)s; // unused
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++bel_pin_count;
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}
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SSOArray<WireId, 2> result(bel_pin_count, WireId());
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bel_pin_count = 0;
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for (auto pin : getBelPinsForCellPin(user_info.cell, user_info.port)) {
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result[bel_pin_count++] = getBelPinWire(dst_bel, pin);
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}
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return result;
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}
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IdString user_port = user_info.port;
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return getBelPinWire(dst_bel, user_port);
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size_t Context::getNetinfoSinkWireCount(const NetInfo *net_info, const PortRef &sink) const
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{
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size_t count = 0;
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for (auto s : getNetinfoSinkWires(net_info, sink)) {
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(void)s; // unused
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++count;
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}
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return count;
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}
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WireId Context::getNetinfoSinkWire(const NetInfo *net_info, const PortRef &sink, size_t phys_idx) const
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{
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size_t count = 0;
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for (auto s : getNetinfoSinkWires(net_info, sink)) {
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if (count == phys_idx)
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return s;
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++count;
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}
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/* TODO: This should be an assertion failure, but for the zero-wire case of unplaced sinks; legacy code currently
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assumes WireId Remove once the refactoring process is complete.
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*/
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return WireId();
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}
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delay_t Context::getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &user_info) const
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@ -383,29 +423,33 @@ delay_t Context::getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &us
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if (src_wire == WireId())
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return 0;
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WireId dst_wire = getNetinfoSinkWire(net_info, user_info);
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WireId cursor = dst_wire;
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delay_t delay = 0;
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delay_t max_delay = 0;
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while (cursor != WireId() && cursor != src_wire) {
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auto it = net_info->wires.find(cursor);
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for (auto dst_wire : getNetinfoSinkWires(net_info, user_info)) {
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WireId cursor = dst_wire;
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delay_t delay = 0;
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if (it == net_info->wires.end())
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break;
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while (cursor != WireId() && cursor != src_wire) {
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auto it = net_info->wires.find(cursor);
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PipId pip = it->second.pip;
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if (pip == PipId())
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break;
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if (it == net_info->wires.end())
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break;
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delay += getPipDelay(pip).maxDelay();
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delay += getWireDelay(cursor).maxDelay();
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cursor = getPipSrcWire(pip);
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PipId pip = it->second.pip;
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if (pip == PipId())
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break;
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delay += getPipDelay(pip).maxDelay();
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delay += getWireDelay(cursor).maxDelay();
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cursor = getPipSrcWire(pip);
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}
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if (cursor == src_wire)
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max_delay = std::max(max_delay, delay + getWireDelay(src_wire).maxDelay()); // routed
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else
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max_delay = std::max(max_delay, predictDelay(net_info, user_info)); // unrouted
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}
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if (cursor == src_wire)
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return delay + getWireDelay(src_wire).maxDelay();
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return predictDelay(net_info, user_info);
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return max_delay;
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}
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static uint32_t xorshift32(uint32_t x)
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@ -1494,7 +1494,9 @@ struct Context : Arch, DeterministicRNG
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// --------------------------------------------------------------
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WireId getNetinfoSourceWire(const NetInfo *net_info) const;
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WireId getNetinfoSinkWire(const NetInfo *net_info, const PortRef &sink) const;
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SSOArray<WireId, 2> getNetinfoSinkWires(const NetInfo *net_info, const PortRef &sink) const;
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size_t getNetinfoSinkWireCount(const NetInfo *net_info, const PortRef &sink) const;
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WireId getNetinfoSinkWire(const NetInfo *net_info, const PortRef &sink, size_t phys_idx) const;
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delay_t getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &sink) const;
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// provided by router1.cc
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@ -144,7 +144,7 @@ struct Router1
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int user_idx = arc.user_idx;
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auto src_wire = ctx->getNetinfoSourceWire(net_info);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx], 0);
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arc_queue_insert(arc, src_wire, dst_wire);
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}
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@ -302,7 +302,7 @@ struct Router1
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log_assert(src_wire != WireId());
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for (int user_idx = 0; user_idx < int(net_info->users.size()); user_idx++) {
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx], 0);
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log_assert(dst_wire != WireId());
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arc_key arc;
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@ -375,7 +375,7 @@ struct Router1
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ctx->nameOf(dst_to_arc.at(src_wire).net_info), dst_to_arc.at(src_wire).user_idx);
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for (int user_idx = 0; user_idx < int(net_info->users.size()); user_idx++) {
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx], 0);
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if (dst_wire == WireId())
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log_error("No wire found for port %s on destination cell %s.\n",
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@ -443,7 +443,7 @@ struct Router1
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int user_idx = arc.user_idx;
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auto src_wire = ctx->getNetinfoSourceWire(net_info);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx], 0);
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ripup_flag = false;
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if (ctx->debug) {
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@ -934,7 +934,7 @@ bool Context::checkRoutedDesign() const
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std::unordered_map<WireId, int> dest_wires;
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for (int user_idx = 0; user_idx < int(net_info->users.size()); user_idx++) {
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]);
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auto dst_wire = ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx], 0);
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log_assert(dst_wire != WireId());
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dest_wires[dst_wire] = user_idx;
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@ -150,7 +150,7 @@ struct Router2
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for (size_t j = 0; j < ni->users.size(); j++) {
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auto &usr = ni->users.at(j);
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WireId src_wire = ctx->getNetinfoSourceWire(ni), dst_wire = ctx->getNetinfoSinkWire(ni, usr);
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WireId src_wire = ctx->getNetinfoSourceWire(ni), dst_wire = ctx->getNetinfoSinkWire(ni, usr, 0);
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nets.at(i).src_wire = src_wire;
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if (ni->driver.cell == nullptr)
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src_wire = dst_wire;
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@ -405,7 +405,7 @@ struct Router2
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void reserve_wires_for_arc(NetInfo *net, size_t i)
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{
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WireId src = ctx->getNetinfoSourceWire(net);
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WireId sink = ctx->getNetinfoSinkWire(net, net->users.at(i));
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WireId sink = ctx->getNetinfoSinkWire(net, net->users.at(i), 0);
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if (sink == WireId())
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return;
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std::unordered_set<WireId> rsv;
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@ -479,7 +479,7 @@ struct Router2
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auto &usr = net->users.at(i);
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ROUTE_LOG_DBG("Routing arc %d of net '%s' (%d, %d) -> (%d, %d)\n", int(i), ctx->nameOf(net), ad.bb.x0, ad.bb.y0,
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ad.bb.x1, ad.bb.y1);
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WireId src_wire = ctx->getNetinfoSourceWire(net), dst_wire = ctx->getNetinfoSinkWire(net, usr);
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WireId src_wire = ctx->getNetinfoSourceWire(net), dst_wire = ctx->getNetinfoSinkWire(net, usr, 0);
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if (src_wire == WireId())
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ARC_LOG_ERR("No wire found for port %s on source cell %s.\n", ctx->nameOf(net->driver.port),
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ctx->nameOf(net->driver.cell));
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@ -726,7 +726,7 @@ struct Router2
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if (check_arc_routing(net, i))
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continue;
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auto &usr = net->users.at(i);
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WireId dst_wire = ctx->getNetinfoSinkWire(net, usr);
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WireId dst_wire = ctx->getNetinfoSinkWire(net, usr, 0);
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// Case of arcs that were pre-routed strongly (e.g. clocks)
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if (net->wires.count(dst_wire) && net->wires.at(dst_wire).strength > STRENGTH_STRONG)
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return ARC_SUCCESS;
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@ -751,7 +751,7 @@ struct Router2
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if (res2 != ARC_SUCCESS)
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log_error("Failed to route arc %d of net '%s', from %s to %s.\n", int(i), ctx->nameOf(net),
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ctx->nameOfWire(ctx->getNetinfoSourceWire(net)),
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ctx->nameOfWire(ctx->getNetinfoSinkWire(net, net->users.at(i))));
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ctx->nameOfWire(ctx->getNetinfoSinkWire(net, net->users.at(i), 0)));
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}
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}
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}
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@ -803,7 +803,7 @@ struct Router2
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// Skip routes with no source
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if (src == WireId())
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return true;
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WireId dst = ctx->getNetinfoSinkWire(net, usr);
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WireId dst = ctx->getNetinfoSinkWire(net, usr, 0);
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// Skip routes where the destination is already bound
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if (dst == WireId() || ctx->getBoundWireNet(dst) == net)
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return true;
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@ -869,7 +869,7 @@ void timing_analysis(Context *ctx, bool print_histogram, bool print_fmax, bool p
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log_info(" Sink %s.%s\n", sink_cell->name.c_str(ctx), sink->port.c_str(ctx));
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if (ctx->verbose) {
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auto driver_wire = ctx->getNetinfoSourceWire(net);
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auto sink_wire = ctx->getNetinfoSinkWire(net, *sink);
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auto sink_wire = ctx->getNetinfoSinkWire(net, *sink, 0);
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log_info(" prediction: %f ns estimate: %f ns\n",
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ctx->getDelayNS(ctx->predictDelay(net, *sink)),
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ctx->getDelayNS(ctx->estimateDelay(driver_wire, sink_wire)));
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@ -53,7 +53,7 @@ struct NexusGlobalRouter
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// Lookup source and destination wires
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WireId src = ctx->getNetinfoSourceWire(net);
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WireId dst = ctx->getNetinfoSinkWire(net, net->users.at(user_idx));
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WireId dst = ctx->getNetinfoSinkWire(net, net->users.at(user_idx), 0);
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if (src == WireId())
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log_error("Net '%s' has an invalid source port %s.%s\n", ctx->nameOf(net), ctx->nameOf(net->driver.cell),
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