ice40: Rename ICESTORM_RAM pins
Signed-off-by: David Shah <davey1576@gmail.com>
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@ -79,6 +79,30 @@ CellInfo *create_ice_cell(Design *design, IdString type, IdString name)
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add_port(new_cell, "D_IN_0", PORT_OUT);
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add_port(new_cell, "D_IN_1", PORT_OUT);
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} else if (type == "ICESTORM_RAM") {
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new_cell->params["NEG_CLK_W"] = "0";
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new_cell->params["NEG_CLK_R"] = "0";
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new_cell->params["WRITE_MODE"] = "0";
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new_cell->params["READ_MODE"] = "0";
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add_port(new_cell, "RCLK", PORT_IN);
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add_port(new_cell, "RCLKE", PORT_IN);
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add_port(new_cell, "RE", PORT_IN);
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add_port(new_cell, "WCLK", PORT_IN);
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add_port(new_cell, "WCLKE", PORT_IN);
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add_port(new_cell, "WE", PORT_IN);
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for (int i = 0; i < 16; i++) {
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add_port(new_cell, "WDATA_" + std::to_string(i), PORT_IN);
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add_port(new_cell, "MASK_" + std::to_string(i), PORT_IN);
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add_port(new_cell, "RDATA_" + std::to_string(i), PORT_OUT);
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}
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for (int i = 0; i < 11; i++) {
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add_port(new_cell, "RADDR_" + std::to_string(i), PORT_IN);
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add_port(new_cell, "WADDR_" + std::to_string(i), PORT_IN);
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}
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} else if (type == "SB_GB") {
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add_port(new_cell, "USER_SIGNAL_TO_GLOBAL_BUFFER", PORT_IN);
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add_port(new_cell, "GLOBAL_BUFFER_OUTPUT", PORT_OUT);
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@ -117,18 +117,47 @@ static void pack_nonlut_ffs(Design *design)
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// "Pack" RAMs
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static void pack_ram(Design *design)
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{
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log_info("Packing RAMs..\n");
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std::unordered_set<IdString> packed_cells;
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std::vector<CellInfo *> new_cells;
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for (auto cell : design->cells) {
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CellInfo *ci = cell.second;
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if (is_ram(ci)) {
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ci->params["NEG_CLK_W"] =
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CellInfo *packed = create_ice_cell(design, "ICESTORM_RAM",
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ci->name.str() + "_RAM");
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packed_cells.insert(ci->name);
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new_cells.push_back(packed);
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packed->params["READ_MODE"] = ci->params.at("READ_MODE");
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packed->params["WRITE_MODE"] = ci->params.at("WRITE_MODE");
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packed->params["NEG_CLK_W"] =
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std::to_string(ci->type == "SB_RAM40_4KNW" ||
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ci->type == "SB_RAM40_4KNRNW");
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ci->params["NEG_CLK_R"] =
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packed->params["NEG_CLK_R"] =
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std::to_string(ci->type == "SB_RAM40_4KNR" ||
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ci->type == "SB_RAM40_4KNRNW");
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ci->type = "ICESTORM_RAM";
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packed->type = "ICESTORM_RAM";
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for (auto port : ci->ports) {
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PortInfo &pi = port.second;
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std::string newname = pi.name;
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size_t bpos = newname.find('[');
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if (bpos != std::string::npos) {
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newname = newname.substr(0, bpos) + "_" +
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newname.substr(bpos + 1,
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(newname.size() - bpos) - 2);
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}
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replace_port(ci, pi.name, packed, newname);
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}
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}
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}
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for (auto pcell : packed_cells) {
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design->cells.erase(pcell);
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}
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for (auto ncell : new_cells) {
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design->cells[ncell->name] = ncell;
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}
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}
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// Merge a net into a constant net
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