From 53f025c03f3e055d09ee643b531ff2cc243b0a08 Mon Sep 17 00:00:00 2001 From: Eddie Hung Date: Sun, 11 Nov 2018 12:56:52 -0800 Subject: [PATCH] Improved delay estimator --- xc7/blinky.sh | 11 ++++++++--- xc7/delay.cc | 46 ++++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 50 insertions(+), 7 deletions(-) diff --git a/xc7/blinky.sh b/xc7/blinky.sh index cccc6c24..b116b3ff 100755 --- a/xc7/blinky.sh +++ b/xc7/blinky.sh @@ -5,6 +5,11 @@ yosys blinky.ys xdl -xdl2ncd blinky.xdl bitgen -w blinky.ncd -g UnconstrainedPins:Allow trce blinky.ncd -v 10 -netgen -ofmt verilog -w blinky.ncd blinky_chip.v -tm blinky -iverilog -o blinky_tb blinky_chip.v blinky_tb.v -y/opt/Xilinx/14.7/ISE_DS/ISE/verilog/src/simprims/ -insert_glbl true -vvp -N ./blinky_tb + +#netgen -ofmt verilog -w blinky.ncd blinky_chip.v -tm blinky -insert_glbl true +#iverilog -o blinky_tb blinky_chip.v blinky_tb.v -y/opt/Xilinx/14.7/ISE_DS/ISE/verilog/src/simprims/ +#vvp -N ./blinky_tb + +#xdl -xdl2ncd blinky.xdl -nopips blinky_map.ncd +#par -w blinky_map.ncd blinky_par.ncd blinky.pcf +#bitgen -w blinky_par.ncd -g UnconstrainedPins:Allow diff --git a/xc7/delay.cc b/xc7/delay.cc index fe14a5ce..397bd483 100644 --- a/xc7/delay.cc +++ b/xc7/delay.cc @@ -104,8 +104,27 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const const auto &src_info = torc_info->tiles.getTileInfo(src_tw.getTileIndex()); const auto &dst_tw = torc_info->wire_to_tilewire[dst.index]; const auto &dst_info = torc_info->tiles.getTileInfo(dst_tw.getTileIndex()); - - return 100 * (abs(src_info.getCol() - dst_info.getCol()) + abs(src_info.getRow() - dst_info.getRow())); + auto abs_delta_x = abs(src_info.getCol() - dst_info.getCol()); + auto abs_delta_y = abs(src_info.getRow() - dst_info.getRow()); +#if 1 + auto div_LH = std::div(abs_delta_x, 12); + auto div_LV = std::div(abs_delta_y, 18); + auto div_LVB = std::div(div_LV.rem, 12); + auto div_H6 = std::div(div_LH.rem, 6); + auto div_V6 = std::div(div_LVB.rem, 6); + auto div_H4 = std::div(div_H6.rem, 4); + auto div_V4 = std::div(div_V6.rem, 4); + auto div_H2 = std::div(div_H4.rem, 2); + auto div_V2 = std::div(div_V4.rem, 2); + auto num_H1 = div_H2.rem; + auto num_V1 = div_V2.rem; + return div_LH.quot * 360/2 + div_LVB.quot * 300 + div_LV.quot * 350 + + (div_H6.quot + div_H4.quot) * 210/2 + (div_V6.quot + div_V4.quot) * 210 + + div_H2.quot * 170/2 + div_V2.quot * 170 + + num_H1 * 150/2 + num_V1 * 150; +#else + return std::max(150, 33 * abs_delta_x + 66 * abs_delta_y); +#endif } delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const @@ -113,8 +132,27 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const const auto &driver = net_info->driver; auto driver_loc = getBelLocation(driver.cell->bel); auto sink_loc = getBelLocation(sink.cell->bel); - - return 100 * (abs(driver_loc.x - sink_loc.x) + abs(driver_loc.y - sink_loc.y)); + auto abs_delta_x = abs(driver_loc.x - sink_loc.x); + auto abs_delta_y = abs(driver_loc.y - sink_loc.y); +#if 1 + auto div_LH = std::div(abs_delta_x, 12); + auto div_LV = std::div(abs_delta_y, 18); + auto div_LVB = std::div(div_LV.rem, 12); + auto div_H6 = std::div(div_LH.rem, 6); + auto div_V6 = std::div(div_LVB.rem, 6); + auto div_H4 = std::div(div_H6.rem, 4); + auto div_V4 = std::div(div_V6.rem, 4); + auto div_H2 = std::div(div_H4.rem, 2); + auto div_V2 = std::div(div_V4.rem, 2); + auto num_H1 = div_H2.rem; + auto num_V1 = div_V2.rem; + return div_LH.quot * 360/2 + div_LVB.quot * 300 + div_LV.quot * 350 + + (div_H6.quot + div_H4.quot) * 210/2 + (div_V6.quot + div_V4.quot) * 210 + + div_H2.quot * 170/2 + div_V2.quot * 170 + + num_H1 * 150/2 + num_V1 * 150; +#else + return std::max(150, 33 * abs_delta_x + 66 * abs_delta_y); +#endif } NEXTPNR_NAMESPACE_END