diff --git a/.github/workflows/interchange_ci.yml b/.github/workflows/interchange_ci.yml
index f93a58ce..0fe58db8 100644
--- a/.github/workflows/interchange_ci.yml
+++ b/.github/workflows/interchange_ci.yml
@@ -22,14 +22,17 @@ jobs:
       uses: hendrikmuhs/ccache-action@v1
 
     - name: Get yosys
-      run: git clone https://github.com/YosysHQ/yosys.git
+      run: |
+        git clone https://github.com/YosysHQ/yosys.git
+        cd yosys
+        echo "YOSYS_SHA=$(git rev-parse HEAD)" >> $GITHUB_ENV
 
     - name: Cache yosys installation
       uses: actions/cache@v2
       id: cache-yosys
       with:
         path: .yosys
-        key: cache-yosys-${{ hashFiles('**/yosys/.git/HEAD') }}
+        key: cache-yosys-${{ env.YOSYS_SHA }}
 
     - name: Build yosys
       run: |
@@ -88,14 +91,17 @@ jobs:
       uses: hendrikmuhs/ccache-action@v1
 
     - name: Get yosys
-      run: git clone https://github.com/YosysHQ/yosys.git
+      run: |
+        git clone https://github.com/YosysHQ/yosys.git
+        cd yosys
+        echo "YOSYS_SHA=$(git rev-parse HEAD)" >> $GITHUB_ENV
 
     - name: Cache yosys installation
       uses: actions/cache@v2
       id: cache-yosys
       with:
         path: .yosys
-        key: cache-yosys-${{ hashFiles('**/yosys/.git/HEAD') }}
+        key: cache-yosys-${{ env.YOSYS_SHA }}
 
     - name: Build yosys
       run: |
diff --git a/3rdparty/fpga-interchange-schema b/3rdparty/fpga-interchange-schema
index b3ab0977..7e850b6b 160000
--- a/3rdparty/fpga-interchange-schema
+++ b/3rdparty/fpga-interchange-schema
@@ -1 +1 @@
-Subproject commit b3ab09776c8dc31a71ca2c7fbcb4575219232d16
+Subproject commit 7e850b6bb0d5c4b7e25e94ce9fbbd68a0dbc1e1a
diff --git a/fpga_interchange/fpga_interchange.cpp b/fpga_interchange/fpga_interchange.cpp
index 60331382..cf89ef1c 100644
--- a/fpga_interchange/fpga_interchange.cpp
+++ b/fpga_interchange/fpga_interchange.cpp
@@ -91,6 +91,25 @@ static PhysicalNetlist::PhysNetlist::RouteBranch::Builder emit_branch(
         pip_obj.setForward(true);
         pip_obj.setIsFixed(pip_place_strength.at(pip) >= STRENGTH_FIXED);
 
+        // If this is a pseudo PIP, get its name
+        if (pip_data.pseudo_cell_wires.size() != 0) {
+            for (int32_t wire_index : pip_data.pseudo_cell_wires) {
+                const TileWireInfoPOD &wire_data = tile_type.wire_data[wire_index];
+
+                if (wire_data.site == -1) {
+                    continue;
+                }
+
+                const SiteInstInfoPOD & site_data = site_inst_info(ctx->chip_info, pip.tile, wire_data.site);
+                std::string site_name = site_data.site_name.get();
+                int site_idx = strings->get_index(site_name);
+                pip_obj.setSite(site_idx);
+
+                // It is assumed that a pseudo PIP traverses one site only
+                break;
+            }
+        }
+
         return branch;
     } else {
         BelId bel;