caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

machxo2: Make sure REGSET FF parameter is set in FACADE_SLICE. Init blinky ctr to 0 for miter circuit.

Browse Source
This commit is contained in:
William D. Jones 2020-11-26 19:27:09 -05:00 committed by gatecat
parent da6204442f
commit 5838662b2f
2 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
machxo2/cells.cc
View File

@ -162,6 +162,9 @@ void dff_to_lc(const Context *ctx, CellInfo *dff, CellInfo *lc, bool pass_thru_l
// FACADE_SLICE DI input instead of the FACADE_SLICE M input. // FACADE_SLICE DI input instead of the FACADE_SLICE M input.
lc->params[ctx->id("REG0_SD")] = std::string("0"); lc->params[ctx->id("REG0_SD")] = std::string("0");
// FIXME: This will have to change once we support FFs with reset value of 1.
lc->params[ctx->id("REG0_REGSET")] = std::string("RESET");
replace_port(dff, ctx->id("CLK"), lc, ctx->id("CLK")); replace_port(dff, ctx->id("CLK"), lc, ctx->id("CLK"));
replace_port(dff, ctx->id("DI"), lc, ctx->id("DI0")); replace_port(dff, ctx->id("DI"), lc, ctx->id("DI0"));
replace_port(dff, ctx->id("LSR"), lc, ctx->id("LSR")); replace_port(dff, ctx->id("LSR"), lc, ctx->id("LSR"));

3
machxo2/examples/blinky.v
View File

@ -1,6 +1,7 @@
module top(input clk, rst, output [7:0] leds); module top(input clk, rst, output [7:0] leds);
reg [7:0] ctr; // TODO: Test miter circuit without reset value.
reg [7:0] ctr = 8'h00;
always @(posedge clk) always @(posedge clk)
if (rst) if (rst)
ctr <= 8'h00; ctr <= 8'h00;