From 588042dc997080830e73c10b71c15444756dbeab Mon Sep 17 00:00:00 2001 From: David Shah Date: Mon, 7 Dec 2020 13:26:45 +0000 Subject: [PATCH] nexus: Fix LRAM pin types Signed-off-by: David Shah --- nexus/arch.h | 17 +++++++++-------- nexus/pins.cc | 4 ++-- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/nexus/arch.h b/nexus/arch.h index 7ed0b8c3..2bc56b53 100644 --- a/nexus/arch.h +++ b/nexus/arch.h @@ -838,14 +838,15 @@ enum CellPinStyle PINBIT_1 = 0x2000, // pin has an explicit bit that must be set if tied to 1 PINBIT_CIBMUX = 0x4000, // pin's CIBMUX must be floating for pin to be 1 - PINSTYLE_NONE = 0x0000, // default - PINSTYLE_CIB = 0x4012, // 'CIB' signal, floats high but explicitly zeroed if not used - PINSTYLE_CLK = 0x0107, // CLK type signal, invertible and defaults to disconnected - PINSTYLE_CE = 0x0027, // CE type signal, invertible and defaults to enabled - PINSTYLE_LSR = 0x0017, // LSR type signal, invertible and defaults to not reset - PINSTYLE_DEDI = 0x0000, // dedicated signals, leave alone - PINSTYLE_PU = 0x4022, // signals that float high and default high - PINSTYLE_T = 0x4027, // PIO 'T' signal + PINSTYLE_NONE = 0x0000, // default + PINSTYLE_CIB = 0x4012, // 'CIB' signal, floats high but explicitly zeroed if not used + PINSTYLE_CLK = 0x0107, // CLK type signal, invertible and defaults to disconnected + PINSTYLE_CE = 0x0027, // CE type signal, invertible and defaults to enabled + PINSTYLE_LSR = 0x0017, // LSR type signal, invertible and defaults to not reset + PINSTYLE_DEDI = 0x0000, // dedicated signals, leave alone + PINSTYLE_PU = 0x4022, // signals that float high and default high + PINSTYLE_PU_NONCIB = 0x0022, // signals that float high and default high + PINSTYLE_T = 0x4027, // PIO 'T' signal PINSTYLE_ADLSB = 0x4017, // special case of the EBR address MSBs PINSTYLE_INV_PD = 0x0017, // invertible, pull down by default diff --git a/nexus/pins.cc b/nexus/pins.cc index b6f2a347..0e27214b 100644 --- a/nexus/pins.cc +++ b/nexus/pins.cc @@ -171,8 +171,8 @@ static const std::unordered_map base_cell_pin_data {id_LRAM_CORE, { {id_CLK, PINSTYLE_CLK}, - {id_CEA, PINSTYLE_CE}, - {id_CEB, PINSTYLE_CE}, + {id_CEA, PINSTYLE_PU_NONCIB}, + {id_CEB, PINSTYLE_PU_NONCIB}, {id_OCEA, PINSTYLE_PU}, {id_OCEB, PINSTYLE_PU}, {id_CSA, PINSTYLE_PU},