nexus: Fix LRAM pin types
Signed-off-by: David Shah <dave@ds0.me>
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@ -845,6 +845,7 @@ enum CellPinStyle
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PINSTYLE_LSR = 0x0017, // LSR type signal, invertible and defaults to not reset
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PINSTYLE_DEDI = 0x0000, // dedicated signals, leave alone
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PINSTYLE_PU = 0x4022, // signals that float high and default high
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PINSTYLE_PU_NONCIB = 0x0022, // signals that float high and default high
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PINSTYLE_T = 0x4027, // PIO 'T' signal
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PINSTYLE_ADLSB = 0x4017, // special case of the EBR address MSBs
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@ -171,8 +171,8 @@ static const std::unordered_map<IdString, Arch::CellPinsData> base_cell_pin_data
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{id_LRAM_CORE,
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{
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{id_CLK, PINSTYLE_CLK},
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{id_CEA, PINSTYLE_CE},
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{id_CEB, PINSTYLE_CE},
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{id_CEA, PINSTYLE_PU_NONCIB},
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{id_CEB, PINSTYLE_PU_NONCIB},
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{id_OCEA, PINSTYLE_PU},
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{id_OCEB, PINSTYLE_PU},
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{id_CSA, PINSTYLE_PU},
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