Working on the timing budget annnotator
Signed-off-by: David Shah <davey1576@gmail.com>
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2a41211ce1
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5ca4663294
@ -25,20 +25,72 @@
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NEXTPNR_NAMESPACE_BEGIN
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static delay_t follow_net(Context *ctx, NetInfo *net, int path_length,
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delay_t slack);
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// Follow a path, returning budget to annotate
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static delay_t follow_path(Context *ctx, const PortRef &begin, int path_length,
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static delay_t follow_user_port(Context *ctx, PortRef &user, int path_length,
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delay_t slack)
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{
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if (ctx->getPortClock(begin.cell, begin.port) != IdString()) {
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return slack / path_length;
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delay_t value;
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if (ctx->getPortClock(user.cell, user.port) != IdString()) {
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// At the end of a timing path (arguably, should check setup time
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// here too)
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value = slack / path_length;
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} else {
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// ...
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// Default to the path ending here, if no further paths found
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value = slack / path_length;
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// Follow outputs of the user
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for (auto port : user.cell->ports) {
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if (port.second.type == PORT_OUT) {
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delay_t comb_delay;
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// Look up delay through this path
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bool is_path = ctx->getCellDelay(user.cell, user.port,
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port.first, comb_delay);
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if (is_path) {
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NetInfo *net = port.second.net;
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if (net) {
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delay_t path_budget = follow_net(ctx, net, path_length,
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slack - comb_delay);
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value = std::min(value, path_budget);
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}
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}
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}
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}
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}
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if (value < user.budget) {
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user.budget = value;
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}
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}
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static delay_t follow_net(Context *ctx, NetInfo *net, int path_length,
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delay_t slack)
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{
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delay_t net_budget = slack / path_length;
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for (auto &usr : net->users) {
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net_budget = std::min(
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net_budget, follow_user_port(ctx, usr, path_length + 1, slack));
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}
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return net_budget;
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}
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void assign_budget(Context *ctx, float default_clock)
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{
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// TODO
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for (auto cell : ctx->cells) {
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for (auto port : cell.second->ports) {
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if (port.second.type == PORT_OUT) {
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IdString clock_domain =
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ctx->getPortClock(cell.second, port.first);
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if (clock_domain != IdString()) {
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delay_t slack = delay_t(
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1.0e12 / default_clock); // TODO: clock constraints
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if (port.second.net)
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follow_net(ctx, port.second.net, 0, slack);
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}
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}
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}
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}
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}
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NEXTPNR_NAMESPACE_END
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@ -178,10 +178,10 @@ std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const
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// ---------------------------------------------------------------
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delay_t Arch::getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort) const
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bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort, delay_t &delay) const
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{
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return 0;
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return false;
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}
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IdString Arch::getPortClock(const CellInfo *cell, IdString port) const
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@ -134,8 +134,8 @@ struct Arch : BaseCtx
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std::unordered_set<WireId> wireGraphicsReload;
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std::unordered_set<PipId> pipGraphicsReload;
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delay_t getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort) const;
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort,
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delay_t &delay) const;
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IdString getPortClock(const CellInfo *cell, IdString port) const;
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bool isClockPort(const CellInfo *cell, IdString port) const;
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};
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@ -418,11 +418,11 @@ std::vector<GraphicElement> Arch::getPipGraphics(PipId pip) const
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// -----------------------------------------------------------------------
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delay_t Arch::getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort) const
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bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort, delay_t &delay) const
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{
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// TODO
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return 0;
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return false;
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}
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IdString Arch::getPortClock(const CellInfo *cell, IdString port) const
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@ -758,9 +758,10 @@ struct Arch : BaseCtx
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// -------------------------------------------------
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// Get the delay through a cell from one port to another
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delay_t getCellDelay(const CellInfo *cell, IdString fromPort,
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IdString toPort) const;
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// Get the delay through a cell from one port to another, returning false
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// if no path exists
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bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort,
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delay_t &delay) const;
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// Get the associated clock to a port, or empty if the port is combinational
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IdString getPortClock(const CellInfo *cell, IdString port) const;
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// Return true if a port is a clock
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