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docs: Update Arch API Cell Timing docs

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Signed-off-by: David Shah <davey1576@gmail.com>
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David Shah 2018-08-08 17:58:25 +02:00
parent 3e11ba8afb
commit 674cabb6be
1 changed files with 4 additions and 6 deletions
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docs/archapi.md
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@ -455,13 +455,11 @@ Cell Delay Methods
Returns the delay for the specified path through a cell in the `&delay` argument. The method returns
false if there is no timing relationship from `fromPort` to `toPort`.
### IdString getPortClock(const CellInfo \*cell, IdString port) const
### TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, IdString &clockPort) const
Returns the clock input port for the specified output port.
### bool isClockPort(const CellInfo \*cell, IdString port) const
Returns true if the specified port is a clock input.
Return the _timing port class_ of a port. This can be a register or combinational input or output; clock input or
output; general startpoint or endpoint; or a port ignored for timing purposes. For register ports, clockPort is set
to the associated clock port.
Placer Methods
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