diff --git a/ecp5/arch.cc b/ecp5/arch.cc index d2d62241..4a3e8ef3 100644 --- a/ecp5/arch.cc +++ b/ecp5/arch.cc @@ -500,6 +500,12 @@ IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; } +bool Arch::isIOCell(const CellInfo *cell) const +{ + return cell->type == id("TRELLIS_IO"); +} + + std::vector> Arch::getTilesAtLocation(int row, int col) { std::vector> ret; diff --git a/ecp5/arch.h b/ecp5/arch.h index e00e111a..fd8d0a13 100644 --- a/ecp5/arch.h +++ b/ecp5/arch.h @@ -833,6 +833,8 @@ struct Arch : BaseCtx bool isClockPort(const CellInfo *cell, IdString port) const; // Return true if a port is a net bool isGlobalNet(const NetInfo *net) const; + // Return true if a cell is an IO + bool isIOCell(const CellInfo *cell) const; // ------------------------------------------------- // Placement validity checks diff --git a/generic/arch.h b/generic/arch.h index 59fe8d05..e7010885 100644 --- a/generic/arch.h +++ b/generic/arch.h @@ -215,6 +215,8 @@ struct Arch : BaseCtx bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const; IdString getPortClock(const CellInfo *cell, IdString port) const; bool isClockPort(const CellInfo *cell, IdString port) const; + // Return true if a cell is an IO + bool isIOCell(const CellInfo *cell) const; bool isValidBelForCell(CellInfo *cell, BelId bel) const; bool isBelLocationValid(BelId bel) const;