cleanup: Remove dead/unused code
Note that some '#if 0' code that might still be useful for debugging in the future has been retained. Signed-off-by: D. Shah <dave@ds0.me>
This commit is contained in:
parent
0d97904216
commit
6ecf7f86c8
@ -1123,7 +1123,6 @@ class HeAPPlacer
|
||||
|
||||
#endif
|
||||
workqueue.emplace(r.id, false);
|
||||
// cut_region(r, false);
|
||||
}
|
||||
while (!workqueue.empty()) {
|
||||
auto front = workqueue.front();
|
||||
@ -1139,7 +1138,6 @@ class HeAPPlacer
|
||||
// Try the other dir, in case stuck in one direction only
|
||||
auto res2 = cut_region(r, !front.second);
|
||||
if (res2) {
|
||||
// log_info("RETRY SUCCESS\n");
|
||||
workqueue.emplace(res2->first, front.second);
|
||||
workqueue.emplace(res2->second, front.second);
|
||||
}
|
||||
@ -1356,8 +1354,6 @@ class HeAPPlacer
|
||||
for (int y1 = reg.y0; y1 <= reg.y1; y1++) {
|
||||
for (size_t t = 0; t < beltype.size(); t++) {
|
||||
if (occ_at(reg.x1 + 1, y1, t) > bels_at(reg.x1 + 1, y1, t)) {
|
||||
// log_info("(%d, %d) occ %d bels %d\n", reg.x1+ 1, y1, occ_at(reg.x1 + 1, y1),
|
||||
// bels_at(reg.x1 + 1, y1));
|
||||
over_occ_x = true;
|
||||
break;
|
||||
}
|
||||
@ -1374,8 +1370,6 @@ class HeAPPlacer
|
||||
for (int x1 = reg.x0; x1 <= reg.x1; x1++) {
|
||||
for (size_t t = 0; t < beltype.size(); t++) {
|
||||
if (occ_at(x1, reg.y1 + 1, t) > bels_at(x1, reg.y1 + 1, t)) {
|
||||
// log_info("(%d, %d) occ %d bels %d\n", x1, reg.y1 + 1, occ_at(x1, reg.y1 + 1),
|
||||
// bels_at(x1, reg.y1 + 1));
|
||||
over_occ_y = true;
|
||||
break;
|
||||
}
|
||||
@ -1600,11 +1594,6 @@ class HeAPPlacer
|
||||
if (std::accumulate(left_bels_v.begin(), left_bels_v.end(), 0) == 0 ||
|
||||
std::accumulate(right_bels_v.begin(), right_bels_v.end(), 0) == 0)
|
||||
return {};
|
||||
// log_info("pivot %d target cut %d lc %d lb %d rc %d rb %d\n", pivot, best_tgt_cut,
|
||||
// std::accumulate(left_cells_v.begin(), left_cells_v.end(), 0), std::accumulate(left_bels_v.begin(),
|
||||
// left_bels_v.end(), 0),
|
||||
// std::accumulate(right_cells_v.begin(), right_cells_v.end(), 0),
|
||||
// std::accumulate(right_bels_v.begin(), right_bels_v.end(), 0));
|
||||
|
||||
// Peturb the source cut to eliminate overutilisation
|
||||
auto is_part_overutil = [&](bool r) {
|
||||
@ -1629,8 +1618,7 @@ class HeAPPlacer
|
||||
right_cells_v.at(type_index.at(cut_cells.at(pivot)->type)) -= size;
|
||||
pivot++;
|
||||
}
|
||||
// log_info("peturbed pivot %d lc %d lb %d rc %d rb %d\n", pivot, left_cells, left_bels, right_cells,
|
||||
// right_bels);
|
||||
|
||||
// Split regions into bins, and then spread cells by linear interpolation within those bins
|
||||
auto spread_binlerp = [&](int cells_start, int cells_end, double area_l, double area_r) {
|
||||
int N = cells_end - cells_start;
|
||||
@ -1673,8 +1661,6 @@ class HeAPPlacer
|
||||
NPNR_ASSERT(pos >= orig_left && pos <= orig_right);
|
||||
pos = bl.second + m * (pos - orig_left);
|
||||
}
|
||||
// log("[%f, %f] -> [%f, %f]: %f -> %f\n", orig_left, orig_right, bl.second, br.second,
|
||||
// orig_pos, pos);
|
||||
}
|
||||
}
|
||||
};
|
||||
@ -1690,7 +1676,6 @@ class HeAPPlacer
|
||||
cl.x = std::min(r.x1, std::max(r.x0, int(cl.rawx)));
|
||||
cl.y = std::min(r.y1, std::max(r.y0, int(cl.rawy)));
|
||||
cells_at_location.at(cl.x).at(cl.y).push_back(cell);
|
||||
// log_info("spread pos %d %d\n", cl.x, cl.y);
|
||||
}
|
||||
SpreaderRegion rl, rr;
|
||||
rl.id = int(regions.size());
|
||||
|
@ -1,69 +0,0 @@
|
||||
#include <assert.h>
|
||||
#include <string>
|
||||
#include "log.h"
|
||||
#include "nextpnr.h"
|
||||
|
||||
NEXTPNR_NAMESPACE_BEGIN
|
||||
|
||||
bool check_all_nets_driven(Context *ctx)
|
||||
{
|
||||
const bool debug = false;
|
||||
|
||||
log_info("Rule checker, verifying imported design\n");
|
||||
|
||||
for (auto &cell_entry : ctx->cells) {
|
||||
CellInfo *cell = cell_entry.second.get();
|
||||
|
||||
if (debug)
|
||||
log_info(" Examining cell \'%s\', of type \'%s\'\n", cell->name.c_str(ctx), cell->type.c_str(ctx));
|
||||
for (auto port_entry : cell->ports) {
|
||||
PortInfo &port = port_entry.second;
|
||||
|
||||
if (debug)
|
||||
log_info(" Checking name of port \'%s\' "
|
||||
"against \'%s\'\n",
|
||||
port_entry.first.c_str(ctx), port.name.c_str(ctx));
|
||||
NPNR_ASSERT(port.name == port_entry.first);
|
||||
NPNR_ASSERT(!port.name.empty());
|
||||
|
||||
if (port.net == NULL) {
|
||||
if (debug)
|
||||
log_warning(" Port \'%s\' in cell \'%s\' is unconnected\n", port.name.c_str(ctx),
|
||||
cell->name.c_str(ctx));
|
||||
} else {
|
||||
NPNR_ASSERT(port.net);
|
||||
if (debug)
|
||||
log_info(" Checking for a net named \'%s\'\n", port.net->name.c_str(ctx));
|
||||
NPNR_ASSERT(ctx->nets.count(port.net->name) > 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (auto &net_entry : ctx->nets) {
|
||||
NetInfo *net = net_entry.second.get();
|
||||
|
||||
NPNR_ASSERT(net->name == net_entry.first);
|
||||
if ((net->driver.cell != NULL) && (net->driver.cell->type != ctx->id("GND")) &&
|
||||
(net->driver.cell->type != ctx->id("VCC"))) {
|
||||
|
||||
if (debug)
|
||||
log_info(" Checking for a driver cell named \'%s\'\n", net->driver.cell->name.c_str(ctx));
|
||||
NPNR_ASSERT(ctx->cells.count(net->driver.cell->name) > 0);
|
||||
}
|
||||
|
||||
for (auto user : net->users) {
|
||||
if ((user.cell != NULL) && (user.cell->type != ctx->id("GND")) && (user.cell->type != ctx->id("VCC"))) {
|
||||
|
||||
if (debug)
|
||||
log_info(" Checking for a user cell named \'%s\'\n", user.cell->name.c_str(ctx));
|
||||
NPNR_ASSERT(ctx->cells.count(user.cell->name) > 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (debug)
|
||||
log_info(" Verified!\n");
|
||||
return true;
|
||||
}
|
||||
|
||||
NEXTPNR_NAMESPACE_END
|
@ -602,20 +602,11 @@ struct Timing
|
||||
auto &nc = (*net_crit)[net->name];
|
||||
if (nc.slack.empty())
|
||||
nc.slack.resize(net->users.size(), std::numeric_limits<delay_t>::max());
|
||||
#if 0
|
||||
if (ctx->debug)
|
||||
log_info("Net %s cd %s\n", net->name.c_str(ctx), startdomain.first.clock.c_str(ctx));
|
||||
#endif
|
||||
|
||||
for (size_t i = 0; i < net->users.size(); i++) {
|
||||
delay_t slack = nd.min_required.at(i) -
|
||||
(nd.max_arrival + ctx->getNetinfoRouteDelay(net, net->users.at(i)));
|
||||
#if 0
|
||||
if (ctx->debug)
|
||||
log_info(" user %s.%s required %.02fns arrival %.02f route %.02f slack %.02f\n",
|
||||
net->users.at(i).cell->name.c_str(ctx), net->users.at(i).port.c_str(ctx),
|
||||
ctx->getDelayNS(nd.min_required.at(i)), ctx->getDelayNS(nd.max_arrival),
|
||||
ctx->getDelayNS(ctx->getNetinfoRouteDelay(net, net->users.at(i))), ctx->getDelayNS(slack));
|
||||
#endif
|
||||
|
||||
if (worst_slack.count(startdomain.first))
|
||||
worst_slack.at(startdomain.first) = std::min(worst_slack.at(startdomain.first), slack);
|
||||
else
|
||||
@ -653,23 +644,6 @@ struct Timing
|
||||
nc.cd_worst_slack = worst_slack.at(startdomain.first);
|
||||
}
|
||||
}
|
||||
#if 0
|
||||
if (ctx->debug) {
|
||||
for (auto &nc : *net_crit) {
|
||||
NetInfo *net = ctx->nets.at(nc.first).get();
|
||||
log_info("Net %s maxlen %d worst_slack %.02fns: \n", nc.first.c_str(ctx), nc.second.max_path_length,
|
||||
ctx->getDelayNS(nc.second.cd_worst_slack));
|
||||
if (!nc.second.criticality.empty() && !nc.second.slack.empty()) {
|
||||
for (size_t i = 0; i < net->users.size(); i++) {
|
||||
log_info(" user %s.%s slack %.02fns crit %.03f\n", net->users.at(i).cell->name.c_str(ctx),
|
||||
net->users.at(i).port.c_str(ctx), ctx->getDelayNS(nc.second.slack.at(i)),
|
||||
nc.second.criticality.at(i));
|
||||
}
|
||||
}
|
||||
log_break();
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
return min_slack;
|
||||
}
|
||||
|
25
ecp5/arch.cc
25
ecp5/arch.cc
@ -615,31 +615,6 @@ bool Arch::route()
|
||||
log_error("ECP5 architecture does not support router '%s'\n", router.c_str());
|
||||
}
|
||||
|
||||
#if 0
|
||||
std::vector<std::pair<WireId, int>> fanout_vector;
|
||||
std::copy(wire_fanout.begin(), wire_fanout.end(), std::back_inserter(fanout_vector));
|
||||
std::sort(fanout_vector.begin(), fanout_vector.end(), [](const std::pair<WireId, int> &a, const std::pair<WireId, int> &b) {
|
||||
return a.second > b.second;
|
||||
});
|
||||
for (size_t i = 0; i < std::min(size_t(20), fanout_vector.size()); i++)
|
||||
log_info(" fanout %s = %d\n", getWireName(fanout_vector[i].first).c_str(this), fanout_vector[i].second);
|
||||
log_break();
|
||||
PipId slowest_pip;
|
||||
delay_t slowest_pipdelay = 0;
|
||||
for (auto pip : pip_to_net) {
|
||||
if (pip.second) {
|
||||
delay_t dly = getPipDelay(pip.first).maxDelay();
|
||||
if (dly > slowest_pipdelay) {
|
||||
slowest_pip = pip.first;
|
||||
slowest_pipdelay = dly;
|
||||
}
|
||||
}
|
||||
}
|
||||
log_info(" slowest pip %s = %.02f ns\n", getPipName(slowest_pip).c_str(this), getDelayNS(slowest_pipdelay));
|
||||
log_info(" fanout %d\n", wire_fanout[getPipSrcWire(slowest_pip)]);
|
||||
log_info(" base %d adder %d\n", speed_grade->pip_classes[locInfo(slowest_pip)->pip_data[slowest_pip.index].timing_class].max_base_delay,
|
||||
speed_grade->pip_classes[locInfo(slowest_pip)->pip_data[slowest_pip.index].timing_class].max_fanout_adder);
|
||||
#endif
|
||||
getCtx()->settings[getCtx()->id("route")] = 1;
|
||||
archInfoToAttributes();
|
||||
return result;
|
||||
|
@ -409,14 +409,6 @@ std::vector<std::pair<IdString, std::string>> Arch::getWireAttrs(WireId wire) co
|
||||
ret.push_back(std::make_pair(id("GRID_Y"), stringf("%d", wi.y)));
|
||||
ret.push_back(std::make_pair(id("GRID_Z"), stringf("%d", wi.z)));
|
||||
|
||||
#if 0
|
||||
for (int i = 0; i < wi.num_segments; i++) {
|
||||
auto &si = wi.segments[i];
|
||||
ret.push_back(std::make_pair(id(stringf("segment[%d]", i)),
|
||||
stringf("X%d/Y%d/%s", si.x, si.y, chip_info->tile_wire_names[si.index].get())));
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -830,28 +822,12 @@ std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
|
||||
|
||||
for (int i = 0; i < n; i++)
|
||||
gfxTileWire(ret, p[i].x, p[i].y, chip_info->width, chip_info->height, GfxTileWireId(p[i].index), style);
|
||||
|
||||
#if 0
|
||||
if (ret.empty()) {
|
||||
WireId wire;
|
||||
wire.index = decal.index;
|
||||
log_warning("No gfx decal for wire %s (%d).\n", getWireName(wire).c_str(getCtx()), decal.index);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (decal.type == DecalId::TYPE_PIP) {
|
||||
const PipInfoPOD &p = chip_info->pip_data[decal.index];
|
||||
GraphicElement::style_t style = decal.active ? GraphicElement::STYLE_ACTIVE : GraphicElement::STYLE_HIDDEN;
|
||||
gfxTilePip(ret, p.x, p.y, GfxTileWireId(p.src_seg), GfxTileWireId(p.dst_seg), style);
|
||||
|
||||
#if 0
|
||||
if (ret.empty()) {
|
||||
PipId pip;
|
||||
pip.index = decal.index;
|
||||
log_warning("No gfx decal for pip %s (%d).\n", getPipName(pip).c_str(getCtx()), decal.index);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
if (decal.type == DecalId::TYPE_BEL) {
|
||||
@ -920,14 +896,6 @@ std::vector<GraphicElement> Arch::getDecalGraphics(DecalId decal) const
|
||||
el.y2 = chip_info->bel_data[bel.index].y + main_swbox_y2 + 0.05;
|
||||
ret.push_back(el);
|
||||
}
|
||||
|
||||
#if 0
|
||||
if (ret.empty()) {
|
||||
BelId bel;
|
||||
bel.index = decal.index;
|
||||
log_warning("No gfx decal for bel %s (%d).\n", getBelName(bel).c_str(getCtx()), decal.index);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
Loading…
Reference in New Issue
Block a user