Merge branch 'readme-changes' into 'master'
Improve a lot of the README contents See merge request SymbioticEDA/nextpnr!24
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Clifford Wolf
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README.md
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README.md
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nextpnr -- a portable FPGA place and route tool
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===============================================
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nextpnr is an FPGA place and route tool with emphasis on supporting
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timing-driven place and route for a wide range of real-world FPGA devices.
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It currently supports Lattice iCE40 devices and Lattice ECP5 devices,
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as well as a "generic" back-end for user-defined architectures.
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(ECP5 and "generic" support are still experimental.)
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nextpnr aims to be a vendor neutral, timing driven, FOSS FPGA place and route
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tool.
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Currently nextpnr is beta software at best. But we aim at replacing
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arachne-pnr as official place-and-route tool for the icestorm flow soon.
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nextpnr was [started by SymbioticEDA](https://www.symbioticeda.com/) as an
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experimental replacement for the existing Arachne-PNR base toolchain (hence the
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name *next*pnr). Focusing on supporting timing driven place and route for
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multiple FPGA architectures from the ground up, the experiment has proven
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successful and we believe nextpnr is on its way to being a suitable
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replacement for all users of Arachne-PNR.
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Here is a screenshot of nextpnr for iCE40. Build instructions and getting
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started notes can be found below.
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Currently nextpnr supports;
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* Lattice iCE40 devices supported by [Project IceStorm](http://www.clifford.at/icestorm/),
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* *(experimental)* Lattice ECP5 devices supported by [Project Trellis](https://github.com/SymbiFlow/prjtrellis),
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* *(experimental)* a "generic" back-end for user-defined architectures
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We hope to see Xilinx 7 Series thanks to
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[Project X-Ray](https://github.com/SymbiFlow/prjxray) and even more vendor's
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FPGAs supported in the future. We would love your help in developing this
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awesome new project.
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Here is a screenshot of nextpnr for iCE40. Build instructions and
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[getting started notes](#getting-started) and an [FAQ](#FAQ) can be found
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below.
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<img src="https://i.imgur.com/0spmlBa.png" width="640"/>
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@ -122,8 +133,8 @@ make -j$(nproc)
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Notes for developers
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--------------------
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- All code is formatted using `clang-format` according to the style rules in `.clang-format` (LLVM based with
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- All code is formatted using `clang-format` according to the style rules in `.clang-format` (LLVM based with
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increased indent widths and brace wraps after classes).
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- To automatically format all source code, run `make clangformat`.
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- See the wiki for additional documentation on the architecture API.
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@ -139,6 +150,133 @@ Testing
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- `-DSANITIZE_UNDEFINED=ON`
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- Running valgrind example `valgrind --leak-check=yes --tool=memcheck ./nextpnr-ice40 --json ice40/blinky.json`
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FAQ
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---
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### Which tool chain should I use and why?
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* If you wish to do new **research** into FPGA architectures, place and route
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algorithms or other similar topics, we suggest you look at using
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[Verilog to Routing](https://verilogtorouting.org).
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* If you are developing FPGA code in **Verilog** for a **Lattice iCE40** and
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need an open source toolchain, we suggest you use nextpnr.
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* If you are developing FPGA code in **Verilog** for a **Lattice iCE40** with
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the **existing Arachne-PNR toolchain**, we suggest you start thinking about
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migrating to nextpnr.
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* If you are developing Verilog FPGA code targeted at the Lattice ECP5 and
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need an open source toolchain, you may consider the **extremely
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experimental** ECP5 support in nextpnr.
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* If you are developing FPGA code in **VHDL** you will need to use either a
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version of [Yosys with Verific support]() or the vendor provided tools due
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to the lack of open source VHDL support in Yosys.
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### Why didn't you just improve [Arachne-PNR](https://github.com/cseed/arachne-pnr)?
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[Arachne-PNR](https://github.com/cseed/arachne-pnr) was originally developed as
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part of [Project IceStorm](http://www.clifford.at/icestorm/) to demonstrate it
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was possible to create an open source place and route tool for the iCE40 FPGAs
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that actually produced valid bitstreams.
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For it's original purpose it has served the community extremely well. However,
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it was never designed to support multiple different FPGA devices, nor more
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complicated timing driven routing used by most commercial place and route
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tools.
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It felt like extending Arachne-PNR was not going to be the best path forward, so
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[SymbioticEDA](https://www.symbioticeda.com/) decided to invest in an
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experiment around creating a replacement. nextpnr is the result of that
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experiment and we believe well on it's way to being a direct replacement for
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Arachne-PNR (and hence why it is called *next*pnr).
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### Arachne-PNR does X better!
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If you have a use case which prevents you from switching to nextpnr from
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Arachne, we want to hear about it! Please create an issue following the
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[Arachne-PNR regression template]() and we will do our best to solve the problem!
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We want nextpnr to be a suitable replacement for anyone who is currently a user
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of Arachne.
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### Why are you not just contributing to [Verilog to Routing](https://verilogtorouting.org)?
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We believe that [Verilog to Routing](https://verilogtorouting.org) is a great
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tool and many of the nextpnr developers have made (and continue to make)
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contributions to the project.
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VtR is an extremely flexible tool but focuses on research around FPGA
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architecture and algorithm development. If your goal is research, then we very
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much encourage you to look into VtR further!
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nextpnr takes a different approach by focusing on users developing FPGA code
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for current FPGAs.
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We also believe that support for real architectures will enable interesting new
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research. nextpnr (like all place and route systems). depends heavily on
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research groups like the VtR developers to investigate and push forward FPGA
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algorithms in new and exciting ways.
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#### What is VPR?
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VPR is the "place and route" tool from Verilog To Routing. It has a similar
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role in an FPGA development flow as nextpnr.
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### What about [SymbiFlow](http://symbiflow.github.io)?
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We expect that as nextpnr matures, it will become a key part of the
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[SymbiFlow](http://github.com/SymbiFlow). For now, while still in a more
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experimental state SymbioticEDA will continue to host the project.
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For the moment SymbiFlow is continuing to concentrate on extending Verilog to
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Routing tool to work with real world architectures.
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### Who is working on this project?
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nextpnr was
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[started as an experiment by SymbioticEDA](https://www.symbioticeda.com/) but
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hopes to grow beyond being both just an experiment and developed by a single
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company. Like Linux grew from Linus Torvalds experiment in creating his own
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operating system to something contributed too by many different companies, are
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hope is the same will happen here.
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The project has already accepted a number of contributions from people not
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employed by SymbioticEDA and now with the public release encourages the
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community to contribute too.
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### What is [Project Trellis](https://github.com/SymbiFlow/prjtrellis)?
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[Project Trellis](https://github.com/SymbiFlow/prjtrellis) is the effort to
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document the bitstream format for the Lattice ECP5 series of FPGAs. It also
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includes tooling around bitstream creation.
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Project Trellis is used by nextpnr to enable support for creation of bitstreams
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for these parts.
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### What is [Project X-Ray](https://github.com/SymbiFlow/prjxray)?
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[Project X-Ray](https://github.com/SymbiFlow/prjxray) is the effort to document
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the bitstream format for the Xilinx Series 7 series of FPGAs. It also includes
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tooling around bitstream generation for these parts.
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While nextpnr currently does **not** support these Xilinx parts, we expect it
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will soon by using Project X Ray in a similar manner to Project Trellis.
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### What is [Project IceStorm](http://www.clifford.at/icestorm/)?
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[Project IceStorm](http://www.clifford.at/icestorm/) was both a project to
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document the bitstream for the Lattice iCE40 series of parts **and** a full
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flow including Yosys and Arachne-PNR for converting Verilog into a bitstream for
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these parts.
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As the open source community now has support for multiple different FPGA parts,
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in the nextpnr documentation we generally use Project IceStorm to mean the
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tools that fulfil the same role as Project Trellis or Project X-Ray.
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Links and references
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--------------------
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@ -163,7 +301,3 @@ Links and references
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- [Gaffe](https://github.com/kc8apf/gaffe)
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- [KinglerPAR](https://github.com/rqou/KinglerPAR)
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> SymbiFlow is working with the Verilog to Routing tool to extend the current
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research tool to support real architectures. VtR is strongly focused on
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architecture research but having support for real architectures might enable
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research nextpnr zu providing documentation and explanation.
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