ice40: support u4k

.cirrus/Dockerfile.ubuntu16.04

@@ -27,7 +27,7 @@ RUN set -e -x ;\
     cd /usr/local/src ;\
     git clone --recursive https://github.com/cliffordwolf/icestorm.git ;\
     cd icestorm ;\
-    git reset --hard 9671b760f84ca4006f0ef101a3e3b201df4eabb5 ;\
+    git reset --hard 3a2bfee5cbc0558641668114260d3f644d6b7c83 ;\
     make -j $(nproc) ;\
     make install
 
@@ -51,5 +51,3 @@ RUN set -e -x ;\
     cmake -DCMAKE_INSTALL_PREFIX=/usr . ;\
     make -j $(nproc) ;\
     make install
-
-

ice40/arch.cc

@@ -53,6 +53,7 @@ void load_chipdb();
 const char *chipdb_blob_384 = nullptr;
 const char *chipdb_blob_1k = nullptr;
 const char *chipdb_blob_5k = nullptr;
+const char *chipdb_blob_u4k = nullptr;
 const char *chipdb_blob_8k = nullptr;
 
 boost::iostreams::mapped_file_source blob_files[4];
@@ -74,6 +75,7 @@ void load_chipdb()
     chipdb_blob_384 = mmap_file(0, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-384.bin");
     chipdb_blob_1k = mmap_file(1, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-1k.bin");
     chipdb_blob_5k = mmap_file(2, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-5k.bin");
+    chipdb_blob_u4k = mmap_file(2, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-u4k.bin");
     chipdb_blob_8k = mmap_file(3, EXTERNAL_CHIPDB_ROOT "/ice40/chipdb-8k.bin");
 }
 #endif
@@ -100,6 +102,9 @@ Arch::Arch(ArchArgs args) : args(args)
     } else if (args.type == ArchArgs::UP5K) {
         fast_part = false;
         chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_5k));
+    } else if (args.type == ArchArgs::U4K) {
+        fast_part = false;
+        chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_u4k));
     } else if (args.type == ArchArgs::LP8K || args.type == ArchArgs::HX8K) {
         fast_part = args.type == ArchArgs::HX8K;
         chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_8k));
@@ -144,6 +149,8 @@ std::string Arch::getChipName() const
         return "Lattice HX1K";
     } else if (args.type == ArchArgs::UP5K) {
         return "Lattice UP5K";
+    } else if (args.type == ArchArgs::U4K) {
+        return "Lattice U4K";
     } else if (args.type == ArchArgs::LP8K) {
         return "Lattice LP8K";
     } else if (args.type == ArchArgs::HX8K) {
@@ -166,6 +173,8 @@ IdString Arch::archArgsToId(ArchArgs args) const
         return id("hx1k");
     if (args.type == ArchArgs::UP5K)
         return id("up5k");
+    if (args.type == ArchArgs::U4K)
+        return id("u4k");
     if (args.type == ArchArgs::LP8K)
         return id("lp8k");
     if (args.type == ArchArgs::HX8K)
@@ -645,6 +654,7 @@ bool Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay
                 budget = cin ? 290 : (same_y ? 380 : 670);
                 break;
             case ArchArgs::UP5K:
+            case ArchArgs::U4K:
                 budget = cin ? 560 : (same_y ? 660 : 1220);
                 break;
 #endif
@@ -1053,7 +1063,7 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
                 NPNR_ASSERT(has_ld);
                 if (args.type == ArchArgs::LP1K || args.type == ArchArgs::LP8K || args.type == ArchArgs::LP384) {
                     info.setup.delay = 30 + dlut.delay;
-                } else if (args.type == ArchArgs::UP5K) {
+                } else if (args.type == ArchArgs::UP5K || args.type == ArchArgs::U4K) { // XXX verify u4k
                     info.setup.delay = dlut.delay - 50;
                 } else {
                     info.setup.delay = 20 + dlut.delay;
@@ -1083,7 +1093,7 @@ TimingClockingInfo Arch::getPortClockingInfo(const CellInfo *cell, IdString port
         if (args.type == ArchArgs::LP1K || args.type == ArchArgs::LP8K || args.type == ArchArgs::LP384) {
             io_setup = 115;
             io_clktoq = 210;
-        } else if (args.type == ArchArgs::UP5K) {
+        } else if (args.type == ArchArgs::UP5K || args.type == ArchArgs::U4K) {
             io_setup = 205;
             io_clktoq = 1005;
         }

ice40/arch.h

@@ -248,11 +248,13 @@ NPNR_PACKED_STRUCT(struct ChipInfoPOD {
 extern const char *chipdb_blob_384;
 extern const char *chipdb_blob_1k;
 extern const char *chipdb_blob_5k;
+extern const char *chipdb_blob_u4k;
 extern const char *chipdb_blob_8k;
 #else
 extern const char chipdb_blob_384[];
 extern const char chipdb_blob_1k[];
 extern const char chipdb_blob_5k[];
+extern const char chipdb_blob_u4k[];
 extern const char chipdb_blob_8k[];
 #endif
 
@@ -400,7 +402,8 @@ struct ArchArgs
         LP8K,
         HX1K,
         HX8K,
-        UP5K
+        UP5K,
+        U4K
     } type = NONE;
     std::string package;
 };

ice40/arch_pybindings.cc

@@ -39,6 +39,7 @@ void arch_wrap_python()
             .value("HX1K", ArchArgs::HX1K)
             .value("HX8K", ArchArgs::HX8K)
             .value("UP5K", ArchArgs::UP5K)
+            .value("U4K", ArchArgs::U4K)
             .export_values();
 
     class_<BelId>("BelId").def_readwrite("index", &BelId::index);

ice40/bitstream.cc

@@ -297,6 +297,9 @@ void write_asc(const Context *ctx, std::ostream &out)
     case ArchArgs::UP5K:
         out << ".device 5k" << std::endl;
         break;
+    case ArchArgs::U4K:
+        out << ".device u4k" << std::endl;
+        break;
     default:
         NPNR_ASSERT_FALSE("unsupported device type\n");
     }
@@ -660,7 +663,9 @@ void write_asc(const Context *ctx, std::ostream &out)
                                                                            {"B_SIGNED", 1}};
             configure_extra_cell(config, ctx, cell.second.get(), mac16_params, false, std::string("IpConfig."));
         } else if (cell.second->type == ctx->id("ICESTORM_HFOSC")) {
-            const std::vector<std::pair<std::string, int>> hfosc_params = {{"CLKHF_DIV", 2}, {"TRIM_EN", 1}};
+            std::vector<std::pair<std::string, int>> hfosc_params = {{"CLKHF_DIV", 2}};
+            if (ctx->args.type != ArchArgs::U4K)
+                hfosc_params.push_back(std::pair<std::string, int>("TRIM_EN", 1));
             configure_extra_cell(config, ctx, cell.second.get(), hfosc_params, true, std::string("IpConfig."));
 
         } else if (cell.second->type == ctx->id("ICESTORM_PLL")) {
@@ -753,6 +758,8 @@ void write_asc(const Context *ctx, std::ostream &out)
                 setColBufCtrl = (y == 8 || y == 9 || y == 24 || y == 25);
             } else if (ctx->args.type == ArchArgs::UP5K) {
                 setColBufCtrl = (y == 4 || y == 5 || y == 14 || y == 15 || y == 26 || y == 27);
+            } else if (ctx->args.type == ArchArgs::U4K) {
+                setColBufCtrl = (y == 4 || y == 5 || y == 16 || y == 17);
             } else if (ctx->args.type == ArchArgs::LP384) {
                 setColBufCtrl = false;
             }
@@ -884,6 +891,9 @@ void read_config(Context *ctx, std::istream &in, chipconfig_t &config)
                 case ArchArgs::UP5K:
                     expected = "5k";
                     break;
+                case ArchArgs::U4K:
+                    expected = "u4k";
+                    break;
                 default:
                     log_error("unsupported device type\n");
                 }

ice40/chipdb.py

@@ -492,7 +492,7 @@ def wiredelay(wire_idx, db):
 
 def init_tiletypes(device):
     global num_tile_types, tile_sizes, tile_bits
-    if device == "5k":
+    if device in ["5k", "u4k"]:
         num_tile_types = 10
     else:
         num_tile_types = 5

ice40/constids.inc

@@ -426,6 +426,7 @@ X(SB_WARMBOOT)
 X(ICESTORM_DSP)
 X(ICESTORM_HFOSC)
 X(ICESTORM_LFOSC)
+X(SMCCLK)
 X(SB_I2C)
 X(SB_SPI)
 X(IO_I3C)

ice40/delay.cc

@@ -138,7 +138,7 @@ struct model_params_t
         if (args.type == ArchArgs::LP384 || args.type == ArchArgs::LP1K || args.type == ArchArgs::LP8K)
             return model_lp8k;
 
-        if (args.type == ArchArgs::UP5K)
+        if (args.type == ArchArgs::UP5K || args.type == ArchArgs::U4K)
             return model_up5k;
 
         NPNR_ASSERT(0);

ice40/family.cmake

@@ -5,7 +5,7 @@ if (NOT EXTERNAL_CHIPDB)
             target_compile_definitions(${target} PRIVATE ICE40_HX1K_ONLY=1)
         endforeach (target)
     else()
-        set(devices 384 1k 5k 8k)
+        set(devices 384 1k 5k u4k 8k)
     endif()
 
     set(DB_PY ${CMAKE_CURRENT_SOURCE_DIR}/ice40/chipdb.py)
@@ -20,10 +20,13 @@ if (NOT EXTERNAL_CHIPDB)
         target_sources(ice40_chipdb PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/ice40/resource/embed.cc)
         set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/ice40/resources/chipdb.rc PROPERTIES LANGUAGE RC)
         foreach (dev ${devices})
-            if (dev EQUAL "5k")
+            if (dev STREQUAL "5k")
                 set(OPT_FAST "")
                 set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt)
-            elseif(dev EQUAL "384")
+            elseif (dev STREQUAL "u4k")
+                set(OPT_FAST "")
+                set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_u4k.txt)
+            elseif(dev STREQUAL "384")
                 set(OPT_FAST "")
                 set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt)
             else()
@@ -52,10 +55,13 @@ if (NOT EXTERNAL_CHIPDB)
     else()
         target_compile_options(ice40_chipdb PRIVATE -g0 -O0 -w)
         foreach (dev ${devices})
-            if (dev EQUAL "5k")
+            if (dev STREQUAL "5k")
                 set(OPT_FAST "")
                 set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_up5k.txt)
-            elseif(dev EQUAL "384")
+            elseif (dev STREQUAL "u4k")
+                set(OPT_FAST "")
+                set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_u4k.txt)
+            elseif(dev STREQUAL "384")
                 set(OPT_FAST "")
                 set(OPT_SLOW --slow ${ICEBOX_ROOT}/timings_lp384.txt)
             else()

ice40/main.cc

@@ -60,6 +60,7 @@ po::options_description Ice40CommandHandler::getArchOptions()
     specific.add_options()("hx1k", "set device type to iCE40HX1K");
     specific.add_options()("hx8k", "set device type to iCE40HX8K");
     specific.add_options()("up5k", "set device type to iCE40UP5K");
+    specific.add_options()("u4k", "set device type to iCE5LP4K");
 #endif
     specific.add_options()("package", po::value<std::string>(), "set device package");
     specific.add_options()("pcf", po::value<std::string>(), "PCF constraints file to ingest");
@@ -78,7 +79,7 @@ void Ice40CommandHandler::validate()
 {
     conflicting_options(vm, "read", "json");
     if ((vm.count("lp384") + vm.count("lp1k") + vm.count("lp8k") + vm.count("hx1k") + vm.count("hx8k") +
-         vm.count("up5k")) > 1)
+         vm.count("up5k") + vm.count("u4k")) > 1)
         log_error("Only one device type can be set\n");
 }
 
@@ -147,6 +148,11 @@ std::unique_ptr<Context> Ice40CommandHandler::createContext()
         chipArgs.package = "sg48";
     }
 
+    if (vm.count("u4k")) {
+        chipArgs.type = ArchArgs::U4K;
+        chipArgs.package = "sg48";
+    }
+
     if (chipArgs.type == ArchArgs::NONE) {
         chipArgs.type = ArchArgs::HX1K;
         chipArgs.package = "tq144";

ice40/project.cc

@@ -56,6 +56,9 @@ std::unique_ptr<Context> ProjectHandler::createContext(pt::ptree &root)
     if (arch_type == "up5k") {
         chipArgs.type = ArchArgs::UP5K;
     }
+    if (arch_type == "u4k") {
+        chipArgs.type = ArchArgs::U4K;
+    }
     chipArgs.package = root.get<std::string>("project.arch.package");
 
     return std::unique_ptr<Context>(new Context(chipArgs));

ice40/resource/chipdb.rc

@@ -3,4 +3,5 @@
 IDR_CHIPDB_384 BINARYFILE "..\chipdbs\chipdb-384.bin"
 IDR_CHIPDB_1K  BINARYFILE "..\chipdbs\chipdb-1k.bin"
 IDR_CHIPDB_5K  BINARYFILE "..\chipdbs\chipdb-5k.bin"
+IDR_CHIPDB_U4K BINARYFILE "..\chipdbs\chipdb-u4k.bin"
 IDR_CHIPDB_8K  BINARYFILE "..\chipdbs\chipdb-8k.bin"

ice40/resource/embed.cc

@@ -8,6 +8,7 @@ NEXTPNR_NAMESPACE_BEGIN
 const char *chipdb_blob_384;
 const char *chipdb_blob_1k;
 const char *chipdb_blob_5k;
+const char *chipdb_blob_u4k;
 const char *chipdb_blob_8k;
 
 const char *LoadFileInResource(int name, int type, DWORD &size)
@@ -24,6 +25,7 @@ void load_chipdb()
     chipdb_blob_384 = LoadFileInResource(IDR_CHIPDB_384, BINARYFILE, size);
     chipdb_blob_1k = LoadFileInResource(IDR_CHIPDB_1K, BINARYFILE, size);
     chipdb_blob_5k = LoadFileInResource(IDR_CHIPDB_5K, BINARYFILE, size);
+    chipdb_blob_u4k = LoadFileInResource(IDR_CHIPDB_U4K, BINARYFILE, size);
     chipdb_blob_8k = LoadFileInResource(IDR_CHIPDB_8K, BINARYFILE, size);
 }
 

ice40/resource/resource.h

@@ -3,3 +3,4 @@
 #define IDR_CHIPDB_1K 102
 #define IDR_CHIPDB_5K 103
 #define IDR_CHIPDB_8K 104
+#define IDR_CHIPDB_U4K 105