[FPGA interchange] Add support for global buffers from chipdb.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>

.github/ci/build_interchange.sh

@@ -26,7 +26,7 @@ popd
 RAPIDWRIGHT_PATH="`pwd`/RapidWright"
 INTERCHANGE_SCHEMA_PATH="`pwd`/3rdparty/fpga-interchange-schema/interchange"
 PYTHON_INTERCHANGE_PATH="`pwd`/python-fpga-interchange"
-PYTHON_INTERCHANGE_TAG="v0.0.3"
+PYTHON_INTERCHANGE_TAG="v0.0.4"
 
 # Install python-fpga-interchange libraries
 git clone -b $PYTHON_INTERCHANGE_TAG https://github.com/SymbiFlow/python-fpga-interchange.git $PYTHON_INTERCHANGE_PATH

fpga_interchange/arch.h

@@ -344,7 +344,19 @@ struct Arch : ArchAPI<ArchRanges>
 
     bool getBelGlobalBuf(BelId bel) const final
     {
-        // FIXME: This probably needs to be fixed!
+        auto &bel_data = bel_info(chip_info, bel);
+        IdString bel_name(bel_data.name);
+
+        // Note: Check profiles and see if this should be something other than
+        // a linear scan.  Expectation is that for most arches, this will be
+        // fast enough.
+        for (int32_t global_bel : chip_info->cell_map->global_buffers) {
+            IdString global_bel_name(global_bel);
+            if (bel_name == global_bel_name) {
+                return true;
+            }
+        }
+
         return false;
     }
 

fpga_interchange/chipdb.h

@@ -34,7 +34,7 @@ NEXTPNR_NAMESPACE_BEGIN
  * kExpectedChipInfoVersion
  */
 
-static constexpr int32_t kExpectedChipInfoVersion = 4;
+static constexpr int32_t kExpectedChipInfoVersion = 5;
 
 // Flattened site indexing.
 //
@@ -229,7 +229,12 @@ NPNR_PACKED_STRUCT(struct LutCellPOD {
 
 NPNR_PACKED_STRUCT(struct CellMapPOD {
     // Cell names supported in this arch.
-    RelSlice<int32_t> cell_names;       // constids
+    RelSlice<int32_t> cell_names; // constids
+
+    // BEL names that are global buffers.
+    RelSlice<int32_t> global_buffers; // constids
+
+    // Name of BelBuckets.
     RelSlice<int32_t> cell_bel_buckets; // constids
 
     RelSlice<CellBelMapPOD> cell_bel_map;

fpga_interchange/examples/chipdb.cmake

@@ -210,7 +210,7 @@ function(generate_chipdb)
     #    device <common device>
     #    part <part>
     #    device_target <device target>
-    #    bel_bucket_seeds <bel bucket seeds>
+    #    device_config <device config>
     #    test_package <test_package>
     # )
     # ~~~
@@ -228,7 +228,9 @@ function(generate_chipdb)
     #             share the same xc7a35t device prefix
     #   - part: one among the parts available for a given device
     #   - device_target: target for the device from which the chipdb is generated
-    #   - bel_bucket_seeds: path to the bel bucket seeds YAML file
+    #   - device_config: path to the device configYAML file
+    #       This file specifies some nextpnr specific data, such as BEL bucket
+    #       seeds and global BEL names.
     #   - test_package: package among the ones available for the device. This is used for architecture
     #                   testing only
     #
@@ -241,7 +243,7 @@ function(generate_chipdb)
     # as the binary chipdb
 
     set(options)
-    set(oneValueArgs family device part device_target bel_bucket_seeds test_package)
+    set(oneValueArgs family device part device_target device_config test_package)
     set(multiValueArgs)
 
     cmake_parse_arguments(
@@ -256,7 +258,7 @@ function(generate_chipdb)
     set(device ${generate_chipdb_device})
     set(part ${generate_chipdb_part})
     set(device_target ${generate_chipdb_device_target})
-    set(bel_bucket_seeds ${generate_chipdb_bel_bucket_seeds})
+    set(device_config ${generate_chipdb_device_config})
     set(test_package ${generate_chipdb_test_package})
 
     get_target_property(device_loc ${device_target} LOCATION)
@@ -267,10 +269,10 @@ function(generate_chipdb)
             ${PYTHON_EXECUTABLE} -mfpga_interchange.nextpnr_emit
                 --schema_dir ${INTERCHANGE_SCHEMA_PATH}
                 --output_dir ${CMAKE_CURRENT_BINARY_DIR}
-                --bel_bucket_seeds ${bel_bucket_seeds}
+                --device_config ${device_config}
                 --device ${device_loc}
         DEPENDS
-            ${bel_bucket_seeds}
+            ${device_config}
             ${device_target}
             ${device_loc}
     )

fpga_interchange/examples/devices/xc7a35t/CMakeLists.txt

@@ -9,6 +9,6 @@ generate_chipdb(
     device xc7a35t
     part xc7a35tcsg324-1
     device_target ${xc7a35t_target}
-    bel_bucket_seeds ${PYTHON_INTERCHANGE_PATH}/test_data/series7_bel_buckets.yaml
+    device_config ${PYTHON_INTERCHANGE_PATH}/test_data/series7_device_config.yaml
     test_package csg324
 )