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Address comments for PR

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This commit is contained in:
Miodrag Milanovic 2024-06-18 11:32:41 +02:00
parent 936d658283
commit 744c0303b6
2 changed files with 5 additions and 6 deletions
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1
himbaechel/uarch/ng-ultra/ng_ultra.h
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@ -76,6 +76,7 @@ private:
void write_bitstream_json(const std::string &filename); void write_bitstream_json(const std::string &filename);
void route_clocks(); void route_clocks();
void parse_csv(const std::string &filename); void parse_csv(const std::string &filename);
void remove_constants();
// Misc utility functions // Misc utility functions
bool get_mux_data(BelId bel, IdString port, uint8_t *value); bool get_mux_data(BelId bel, IdString port, uint8_t *value);

10
himbaechel/uarch/ng-ultra/pack.cc
View File

@ -74,7 +74,7 @@ void NgUltraPacker::pack_constants(void)
h.replace_constants(CellTypePort(id_BEYOND_FE, id_LO), CellTypePort(id_BEYOND_FE, id_LO), vcc_params, gnd_params); h.replace_constants(CellTypePort(id_BEYOND_FE, id_LO), CellTypePort(id_BEYOND_FE, id_LO), vcc_params, gnd_params);
} }
void remove_constants(Context *ctx) void NgUltraImpl::remove_constants()
{ {
log_info("Removing constants..\n"); log_info("Removing constants..\n");
auto fnd_cell = ctx->cells.find(ctx->id("$PACKER_VCC_DRV")); auto fnd_cell = ctx->cells.find(ctx->id("$PACKER_VCC_DRV"));
@ -1284,18 +1284,16 @@ void NgUltraImpl::postPlace()
// it is considered that signal is comming from RI1 crossbar. // it is considered that signal is comming from RI1 crossbar.
// We need to prevent router to use that crossbar output for // We need to prevent router to use that crossbar output for
// any other signal. // any other signal.
Loc loc = ctx->getBelLocation(ci.bel);
for (int i=1;i<=4;i++) { for (int i=1;i<=4;i++) {
IdString port = ctx->idf("A%d",i); IdString port = ctx->idf("A%d",i);
NetInfo *net = ci.getPort(port); NetInfo *net = ci.getPort(port);
if (!net) if (!net)
continue; continue;
if (net->name.in(ctx->id("$PACKER_GND"))) { if (net->name.in(ctx->id("$PACKER_GND"))) {
BelId bel = ctx->getBelByLocation(loc); WireId dwire = ctx->getBelPinWire(ci.bel, port);
WireId dwire = ctx->getBelPinWire(bel, port);
for (PipId pip : ctx->getPipsUphill(dwire)) { for (PipId pip : ctx->getPipsUphill(dwire)) {
WireId src = ctx->getPipSrcWire(pip); WireId src = ctx->getPipSrcWire(pip);
std::string src_name = ctx->getWireName(src)[1].c_str(ctx); const std::string src_name = ctx->getWireName(src)[1].str(ctx);
if (boost::starts_with(src_name,"RI1")) { if (boost::starts_with(src_name,"RI1")) {
for (PipId pip2 : ctx->getPipsDownhill(src)) { for (PipId pip2 : ctx->getPipsDownhill(src)) {
blocked_pips.emplace(pip2); blocked_pips.emplace(pip2);
@ -1306,7 +1304,7 @@ void NgUltraImpl::postPlace()
} }
} }
} }
remove_constants(ctx); remove_constants();
} }
void NgUltraImpl::route_clocks() void NgUltraImpl::route_clocks()