From 78905c3ecf0cc283a79f064bf7e50aa6cdab2743 Mon Sep 17 00:00:00 2001 From: gatecat Date: Sat, 11 Dec 2021 19:38:14 +0000 Subject: [PATCH] mistral: DATAIN and DATAOUT of GPIO have swapped Signed-off-by: gatecat --- mistral/io.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/mistral/io.cc b/mistral/io.cc index 3a72b001..dab3672e 100644 --- a/mistral/io.cc +++ b/mistral/io.cc @@ -31,9 +31,9 @@ void Arch::create_gpio(int x, int y) BelId bel = add_bel(x, y, id(stringf("IO[%d]", z)), id_MISTRAL_IO); add_bel_pin(bel, id_PAD, PORT_INOUT, pad); // FIXME: is the port index of zero always correct? - add_bel_pin(bel, id_I, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAIN, 0)); + add_bel_pin(bel, id_I, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)); add_bel_pin(bel, id_OE, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::OEIN, 0)); - add_bel_pin(bel, id_O, PORT_OUT, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)); + add_bel_pin(bel, id_O, PORT_OUT, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAIN, 0)); bel_data(bel).block_index = z; } }