basic support for few small primitives
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@ -259,10 +259,9 @@ struct MachXO2Bitgen
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std::vector<std::string> tiles;
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std::vector<std::string> tiles;
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Loc loc = ctx->getBelLocation(bel);
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Loc loc = ctx->getBelLocation(bel);
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if (name == "EHXPLL_L") {
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if (name == "LPLL") {
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tiles.push_back(ctx->get_tile_by_type_loc(loc.y-1, loc.x-1, "GPLL_L0"));
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tiles.push_back(ctx->get_tile_by_type_loc(loc.y-1, loc.x-1, "GPLL_L0"));
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//tiles.push_back(ctx->get_tile_by_type_loc(loc.y, loc.x, "CIB_PIC_T_DUMMY"));
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} else if (name == "RPLL") {
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} else if (name == "EHXPLL_R") {
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tiles.push_back(ctx->get_tile_by_type_loc(loc.y+1, loc.x-1, "GPLL_R0"));
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tiles.push_back(ctx->get_tile_by_type_loc(loc.y+1, loc.x-1, "GPLL_R0"));
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} else {
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} else {
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NPNR_ASSERT_FALSE_STR("bad PLL loc " + name);
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NPNR_ASSERT_FALSE_STR("bad PLL loc " + name);
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@ -695,6 +694,33 @@ struct MachXO2Bitgen
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write_bram(ci);
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write_bram(ci);
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} else if (ci->type == id_EHXPLLJ) {
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} else if (ci->type == id_EHXPLLJ) {
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write_pll(ci);
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write_pll(ci);
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} else if (ci->type == id_GSR) {
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum(
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"GSR.GSRMODE", str_or_default(ci->params, id_MODE, "ACTIVE_LOW"));
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum("GSR.SYNCMODE",
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str_or_default(ci->params, id_SYNCMODE, "ASYNC"));
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} else if (ci->type == id_JTAGF) {
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum("JTAG.ER1",
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str_or_default(ci->params, id_ER1, "ENABLED"));
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum("JTAG.ER2",
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str_or_default(ci->params, id_ER2, "ENABLED"));
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} else if (ci->type == id_TSALL) {
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum(
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"TSALL.MODE", str_or_default(ci->params, id_MODE, "TSALL"));
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cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum(
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"TSALL.TSALL", str_or_default(ci->params, id_TSALL, "TSALL"));
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} else if (ci->type == id_START) {
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cc.tiles[ctx->get_tile_by_type("CIB_CFG0")].add_enum(
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"START.STARTCLK", str_or_default(ci->params, id_STARTCLK, "STARTCLK"));
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} else if (ci->type == id_CLKDIVC) {
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Loc loc = ctx->getBelLocation(ci->bel);
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bool t = loc.y < 2;
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std::string clkdiv = (t ? "T": "B") + std::string("CLKDIV") + std::to_string(loc.z);
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std::string tile = ctx->get_tile_by_type(t ? "PIC_T_DUMMY_VIQ" : "PIC_B_DUMMY_VIQ_VREF");
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cc.tiles[tile].add_enum(clkdiv + ".DIV", str_or_default(ci->params, id_DIV, "2.0"));
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cc.tiles[tile].add_enum(clkdiv + ".GSR", str_or_default(ci->params, id_GSR, "DISABLED"));
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} else {
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NPNR_ASSERT_FALSE("unsupported cell type");
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}
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}
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}
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}
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}
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}
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@ -1068,6 +1068,26 @@ class MachXO2Packer
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}
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}
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}
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}
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// Miscellaneous packer tasks
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void pack_misc()
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{
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for (auto &cell : ctx->cells) {
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CellInfo *ci = cell.second.get();
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if (ci->type.in(id_GSR, id_SGSR)) {
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ci->params[id_MODE] = std::string("ACTIVE_LOW");
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ci->params[id_SYNCMODE] = ci->type == id_SGSR ? std::string("SYNC") : std::string("ASYNC");
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ci->type = id_GSR;
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for (BelId bel : ctx->getBels()) {
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if (ctx->getBelType(bel) != id_GSR)
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continue;
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ci->attrs[id_BEL] = ctx->getBelName(bel).str(ctx);
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}
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} else if (ci->type.in(id_TSALL)) {
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ci->renamePort(id_TSALL, id_TSALLI);
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}
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}
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}
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// Preplace PLL
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// Preplace PLL
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void preplace_plls()
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void preplace_plls()
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{
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{
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@ -1357,6 +1377,7 @@ class MachXO2Packer
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pack_io();
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pack_io();
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preplace_plls();
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preplace_plls();
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pack_ebr();
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pack_ebr();
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pack_misc();
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pack_constants();
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pack_constants();
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pack_dram();
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pack_dram();
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pack_carries();
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pack_carries();
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