diff --git a/common/hashlib.h b/common/hashlib.h index 70de8c91..2f7357e2 100644 --- a/common/hashlib.h +++ b/common/hashlib.h @@ -28,9 +28,7 @@ const int hashtable_size_factor = 3; // Cantor pairing function for two non-negative integers // https://en.wikipedia.org/wiki/Pairing_function -inline unsigned int mkhash(unsigned int a, unsigned int b) { - return (a*a + 3*a + 2*a*b + b + b*b) / 2; -} +inline unsigned int mkhash(unsigned int a, unsigned int b) { return (a * a + 3 * a + 2 * a * b + b + b * b) / 2; } // traditionally 5381 is used as starting value for the djb2 hash const unsigned int mkhash_init = 5381; diff --git a/gowin/gfx.h b/gowin/gfx.h index b5ea4678..623b9fb2 100644 --- a/gowin/gfx.h +++ b/gowin/gfx.h @@ -24,7 +24,6 @@ NEXTPNR_NAMESPACE_BEGIN - void gfxCreateBelDecals(Arch *arch); void gfxSetBelDefaultDecal(Arch *arch, BelInfo &bel); void gfxSetIOBWireDecals(Arch *arch, BelInfo &bel); diff --git a/mistral/arch.cc b/mistral/arch.cc index f61d07ab..c50e30f4 100644 --- a/mistral/arch.cc +++ b/mistral/arch.cc @@ -43,18 +43,19 @@ void IdString::initialize_arch(const BaseCtx *ctx) #undef X } -CycloneV::rnode_t Arch::find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi, int pi) const +CycloneV::rnode_t Arch::find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi, + int pi) const { auto pn1 = CycloneV::pnode(bt, x, y, port, bi, pi); auto rn1 = cyclonev->pnode_to_rnode(pn1); - if(rn1) + if (rn1) return rn1; - if(bt == CycloneV::GPIO) { + if (bt == CycloneV::GPIO) { auto pn2 = cyclonev->p2p_to(pn1); - if(!pn2) { + if (!pn2) { auto pnv = cyclonev->p2p_from(pn1); - if(!pnv.empty()) + if (!pnv.empty()) pn2 = pnv[0]; } auto pn3 = cyclonev->hmc_get_bypass(pn2); @@ -68,9 +69,9 @@ CycloneV::rnode_t Arch::find_rnode(CycloneV::block_type_t bt, int x, int y, Cycl WireId Arch::get_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi) const { auto rn = find_rnode(bt, x, y, port, bi, pi); - if(rn) + if (rn) return WireId(rn); - + log_error("Trying to connect unknown node %s\n", CycloneV::pn2s(CycloneV::pnode(bt, x, y, port, bi, pi)).c_str()); } diff --git a/mistral/arch.h b/mistral/arch.h index e931df2d..e17be331 100644 --- a/mistral/arch.h +++ b/mistral/arch.h @@ -461,7 +461,8 @@ struct Arch : BaseArch void add_bel_pin(BelId bel, IdString pin, PortType dir, WireId wire); - CycloneV::rnode_t find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi = -1, int pi = -1) const; + CycloneV::rnode_t find_rnode(CycloneV::block_type_t bt, int x, int y, CycloneV::port_type_t port, int bi = -1, + int pi = -1) const; WireId get_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const; bool has_port(CycloneV::block_type_t bt, int x, int y, int bi, CycloneV::port_type_t port, int pi = -1) const; @@ -561,7 +562,7 @@ struct Arch : BaseArch // ------------------------------------------------- - void build_bitstream(); // bitstream.cc + void build_bitstream(); // bitstream.cc }; NEXTPNR_NAMESPACE_END diff --git a/mistral/bitstream.cc b/mistral/bitstream.cc index 340f4b96..e18d1413 100644 --- a/mistral/bitstream.cc +++ b/mistral/bitstream.cc @@ -39,14 +39,14 @@ struct MistralBitgen { auto pn1 = CycloneV::pnode(bt, pos, port, bi, pi); auto rn1 = cv->pnode_to_rnode(pn1); - if(rn1) + if (rn1) return rn1; - if(bt == CycloneV::GPIO) { + if (bt == CycloneV::GPIO) { auto pn2 = cv->p2p_to(pn1); - if(!pn2) { + if (!pn2) { auto pnv = cv->p2p_from(pn1); - if(!pnv.empty()) + if (!pnv.empty()) pn2 = pnv[0]; } auto pn3 = cv->hmc_get_bypass(pn2); @@ -97,9 +97,11 @@ struct MistralBitgen // Output gpios must also bypass things in the associated dqs auto dqs = cv->p2p_to(CycloneV::pnode(CycloneV::GPIO, pos, CycloneV::PNONE, bi, -1)); - if(dqs) { - cv->bmux_m_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::INPUT_REG4_SEL, CycloneV::pn2bi(dqs), CycloneV::SEL_LOCKED_DPA); - cv->bmux_r_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::RB_T9_SEL_EREG_CFF_DELAY, CycloneV::pn2bi(dqs), 0x1f); + if (dqs) { + cv->bmux_m_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::INPUT_REG4_SEL, CycloneV::pn2bi(dqs), + CycloneV::SEL_LOCKED_DPA); + cv->bmux_r_set(CycloneV::DQS16, CycloneV::pn2p(dqs), CycloneV::RB_T9_SEL_EREG_CFF_DELAY, + CycloneV::pn2bi(dqs), 0x1f); } } // There seem to be two mirrored OEIN inversion bits for constant OE for inputs/outputs. This might be to diff --git a/mistral/io.cc b/mistral/io.cc index a0a01af3..c8d0238d 100644 --- a/mistral/io.cc +++ b/mistral/io.cc @@ -30,7 +30,7 @@ void Arch::create_gpio(int x, int y) WireId pad = add_wire(x, y, id(stringf("PAD[%d]", z))); BelId bel = add_bel(x, y, id(stringf("IO[%d]", z)), id_MISTRAL_IO); add_bel_pin(bel, id_PAD, PORT_INOUT, pad); - if(has_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)) { + if (has_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)) { // FIXME: is the port index of zero always correct? add_bel_pin(bel, id_I, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::DATAOUT, 0)); add_bel_pin(bel, id_OE, PORT_IN, get_port(CycloneV::GPIO, x, y, z, CycloneV::OEIN, 0)); diff --git a/nexus/main.cc b/nexus/main.cc index b02dfa99..88dddfe5 100644 --- a/nexus/main.cc +++ b/nexus/main.cc @@ -54,8 +54,7 @@ po::options_description NexusCommandHandler::getArchOptions() specific.add_options()("no-pack-lutff", "disable packing (clustering) LUTs and FFs together"); specific.add_options()("carry-lutff-ratio", po::value(), "ratio of FFs to be added to carry-chain LUT clusters"); - specific.add_options()("estimate-delay-mult", po::value(), - "multiplier for the estimate delay"); + specific.add_options()("estimate-delay-mult", po::value(), "multiplier for the estimate delay"); return specific; }