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Add implicit wire

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This commit is contained in:
Eddie Hung 2018-12-27 23:27:50 -08:00
parent e15aa8d3f4
commit 84d038360d
1 changed files with 1 additions and 0 deletions
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xc7/blinky.v
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@ -5,6 +5,7 @@ module blinky (
output led2, output led2,
output led3 output led3
); );
wire clk;
BUFGCTRL clk_gb ( BUFGCTRL clk_gb (
.I0(clki), .I0(clki),
.CE0(1'b1), .CE0(1'b1),