cyclonev: Add routing graph
Signed-off-by: gatecat <gatecat@ds0.me>
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5d1b8bf744
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8677d59b92
@ -55,6 +55,7 @@ Arch::Arch(ArchArgs args)
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id2rn_t[rnode_id] = CycloneV::rnode_type_t(t);
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}
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log_info("Initialising bels...\n");
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for (int x = 0; x < cyclonev->get_tile_sx(); x++) {
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for (int y = 0; y < cyclonev->get_tile_sy(); y++) {
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CycloneV::pos_t pos = cyclonev->xy2pos(x, y);
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@ -86,6 +87,24 @@ Arch::Arch(ArchArgs args)
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}
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}
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// This import takes about 5s, perhaps long term we can speed it up, e.g. defer to Mistral more...
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log_info("Initialising routing graph...\n");
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int pip_count = 0;
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for (const auto &mux : cyclonev->dest_node_to_rmux) {
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const auto &rmux = cyclonev->rmux_info[mux.second];
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WireId dst_wire(mux.first);
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for (const auto &src : rmux.sources) {
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if (CycloneV::rn2t(src) == CycloneV::NONE)
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continue;
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WireId src_wire(src);
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wires[dst_wire].wires_uphill.push_back(src_wire);
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wires[src_wire].wires_downhill.push_back(dst_wire);
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++pip_count;
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}
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}
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log_info(" imported %d wires and %d pips\n", int(wires.size()), pip_count);
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BaseArch::init_cell_types();
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BaseArch::init_bel_buckets();
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}
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@ -49,6 +49,9 @@ struct BelInfo
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// TODO
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};
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// We maintain our own wire data based on mistral's. This gets us the bidirectional linking that nextpnr needs,
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// and also makes it easy to add wires and pips for our own purposes like LAB internal routing, global clock
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// sources, etc.
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struct WireInfo
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{
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// name_override is only used for nextpnr-created wires
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@ -102,6 +105,55 @@ struct UpDownhillPipRange
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UpDownhillPipIterator end() const { return e; }
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};
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// This iterates over the list of wires, and for each wire yields its uphill pips, as an efficient way of going over
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// all the pips in the device
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using WireMapIterator = std::unordered_map<WireId, WireInfo>::const_iterator;
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struct AllPipIterator
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{
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WireMapIterator base, end;
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int uphill_idx;
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AllPipIterator(WireMapIterator base, WireMapIterator end, int uphill_idx)
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: base(base), end(end), uphill_idx(uphill_idx){};
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bool operator!=(const AllPipIterator &other) { return base != other.base || uphill_idx != other.uphill_idx; }
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AllPipIterator operator++()
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{
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// Increment uphill list index by one
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++uphill_idx;
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// We've reached the end of the current wire. Keep incrementing the wire of interest until we find one with
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// uphill pips, or we reach the end of the list of wires
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while (base != end && uphill_idx >= int(base->second.wires_uphill.size())) {
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uphill_idx = 0;
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++base;
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}
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return *this;
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}
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AllPipIterator operator++(int)
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{
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AllPipIterator prior(*this);
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++(*this);
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return prior;
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}
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PipId operator*() { return PipId(base->second.wires_uphill.at(uphill_idx).node, base->first.node); }
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};
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struct AllPipRange
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{
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AllPipIterator b, e;
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AllPipRange(const std::unordered_map<WireId, WireInfo> &wires)
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: b(wires.cbegin(), wires.cend(), -1), e(wires.cend(), wires.cend(), 0)
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{
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// Starting the begin iterator at index -1 and incrementing it ensures we skip over the first wire if it has no
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// uphill pips
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++b;
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};
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AllPipIterator begin() const { return b; }
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AllPipIterator end() const { return e; }
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};
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// This transforms a map to a range of keys, used as the wire iterator
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template <typename T> struct key_range
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{
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@ -134,7 +186,7 @@ struct ArchRanges : BaseArchRanges
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using UphillPipRangeT = UpDownhillPipRange;
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using WireBelPinRangeT = const std::vector<BelPin> &;
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// Pips
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using AllPipsRangeT = const std::unordered_set<PipId> &;
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using AllPipsRangeT = AllPipRange;
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};
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struct Arch : BaseArch<ArchRanges>
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@ -187,7 +239,7 @@ struct Arch : BaseArch<ArchRanges>
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// -------------------------------------------------
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PipId getPipByName(IdStringList name) const override;
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const std::unordered_set<PipId> &getPips() const override { return all_pips; }
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AllPipRange getPips() const override { return AllPipRange(wires); }
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Loc getPipLocation(PipId pip) const override { return Loc(0, 0, 0); }
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IdStringList getPipName(PipId pip) const override;
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WireId getPipSrcWire(PipId pip) const override { return WireId(pip.src); };
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@ -231,8 +283,6 @@ struct Arch : BaseArch<ArchRanges>
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std::unordered_map<BelId, BelInfo> bels;
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// WIP to link without failure
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std::unordered_set<PipId> all_pips;
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std::vector<PipId> empty_pip_list;
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std::vector<BelPin> empty_belpin_list;
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// Conversion between numbers and rnode types and IdString, for fast wire name implementation
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