picorv32_top to instantiate BUFGCTRL, and picorv32.sh to use picorv32.ys script

This commit is contained in:
Eddie Hung 2018-09-03 19:23:00 -07:00
parent 7f1c1ecaf0
commit 86fa032b63
2 changed files with 14 additions and 4 deletions

View File

@ -2,6 +2,7 @@
set -ex set -ex
rm -f picorv32.v rm -f picorv32.v
wget https://raw.githubusercontent.com/cliffordwolf/picorv32/master/picorv32.v wget https://raw.githubusercontent.com/cliffordwolf/picorv32/master/picorv32.v
yosys -p 'synth_ice40 -json picorv32.json -top top' picorv32.v picorv32_top.v yosys picorv32.ys
../nextpnr-ice40 --hx8k --asc picorv32.asc --json picorv32.json ../nextpnr-xc7 --json picorv32.json --xdl picorv32.xdl
icetime -d hx8k -t picorv32.asc #../nextpnr-ice40 --hx8k --asc picorv32.asc --json picorv32.json
#icetime -d hx8k -t picorv32.asc

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@ -11,13 +11,22 @@ module top (
output [ 3:0] mem_wstrb, output [ 3:0] mem_wstrb,
input [31:0] mem_rdata input [31:0] mem_rdata
); );
wire gclk;
BUFGCTRL clk_gb (
.I0(clk),
.CE0(1'b1),
.S0(1'b1),
.O(gclk)
);
picorv32 #( picorv32 #(
.ENABLE_COUNTERS(0), .ENABLE_COUNTERS(0),
.TWO_STAGE_SHIFT(0), .TWO_STAGE_SHIFT(0),
.CATCH_MISALIGN(0), .CATCH_MISALIGN(0),
.CATCH_ILLINSN(0) .CATCH_ILLINSN(0)
) cpu ( ) cpu (
.clk (clk ), .clk (gclk ),
.resetn (resetn ), .resetn (resetn ),
.trap (trap ), .trap (trap ),
.mem_valid(mem_valid), .mem_valid(mem_valid),