caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Himbaechel xilinx : DSP packing : Disable clustering

Browse Source
This commit is contained in:
Adrien Prost-Boucle 2024-09-19 10:54:55 +02:00
parent e441749b5a
commit 8f2119a9d4
1 changed files with 6 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
himbaechel/uarch/xilinx/pack_dsp_xc7.cc
View File

@ -81,6 +81,8 @@ void XC7Packer::walk_dsp(CellInfo *root, CellInfo *current_cell, int constr_z)
// the connected cell has to be above the current cell, // the connected cell has to be above the current cell,
// otherwise it cannot be routed, because the cascading ports // otherwise it cannot be routed, because the cascading ports
// are only connected to the DSP above // are only connected to the DSP above
// FIXME The offset +/-5 applies to DSP tiles, not to DSP slices
// So two cascaded DSPs can be placed in one tile, which does not correspond to a +/-5 offset
auto previous_y = (current_cell == root) ? 0 : current_cell->constr_y; auto previous_y = (current_cell == root) ? 0 : current_cell->constr_y;
cascaded_cell->constr_y = previous_y + (is_lower_bel ? -5 : 0); cascaded_cell->constr_y = previous_y + (is_lower_bel ? -5 : 0);
cascaded_cell->constr_z = constr_z; cascaded_cell->constr_z = constr_z;
@ -169,11 +171,15 @@ void XC7Packer::pack_dsps()
} }
} }
// Creating placement clusters is currently disabled, because the current constraints
// on Y coordinates don't always correspond to placement possibilities, which makes placer crash
#if 0
for (auto root : dsp_roots) { for (auto root : dsp_roots) {
root->constr_abs_z = true; root->constr_abs_z = true;
root->constr_z = BEL_LOWER_DSP; root->constr_z = BEL_LOWER_DSP;
walk_dsp(root, root, BEL_UPPER_DSP); walk_dsp(root, root, BEL_UPPER_DSP);
} }
#endif
} }
NEXTPNR_NAMESPACE_END NEXTPNR_NAMESPACE_END