From 8fd4735292b6ebf5df7f8471a11fd2aa7eb9bd7d Mon Sep 17 00:00:00 2001
From: Miodrag Milanovic <mmicko@gmail.com>
Date: Tue, 25 Apr 2023 16:18:28 +0200
Subject: [PATCH] handle some SYSCONFIG

---
 machxo2/bitstream.cc | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/machxo2/bitstream.cc b/machxo2/bitstream.cc
index 98af4866..bf7d13a7 100644
--- a/machxo2/bitstream.cc
+++ b/machxo2/bitstream.cc
@@ -723,6 +723,23 @@ struct MachXO2Bitgen
                 NPNR_ASSERT_FALSE("unsupported cell type");
             }
         }
+
+        // Add some SYSCONFIG settings
+        const std::string prefix = "arch.sysconfig.";
+        for (auto &setting : ctx->settings) {
+            std::string key = setting.first.str(ctx);
+            if (key.substr(0, prefix.length()) != prefix)
+                continue;
+            key = key.substr(prefix.length());
+            std::string value = setting.second.as_string();
+            if (key == "BACKGROUND_RECONFIG" || key == "ENABLE_TRANSFR" || key == "SDM_PORT") {
+                cc.tiles[ctx->get_tile_by_type("CFG0")].add_enum("SYSCONFIG." + key, value);
+            } else if (key == "I2C_PORT" || key == "MASTER_SPI_PORT" || key == "SLAVE_SPI_PORT") {
+                cc.tiles[ctx->get_tile_by_type("CFG1")].add_enum("SYSCONFIG." + key, value);
+            } else {
+                cc.sysconfig[key] = value;
+            }
+        }
     }
 };
 } // namespace