Fix URLs in Markdown.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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@ -30,7 +30,7 @@ island based FPGA. It consists of three primary file formats:
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This architecture implementation can be compiled in conjunction with a FPGA
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interchange device database, and the outputs from
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`fpga_interchange.nextpnr_emit`, which is part of the
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(python-fpga-interchange)[https://github.com/SymbiFlow/python-fpga-interchange/]
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[python-fpga-interchange](https://github.com/SymbiFlow/python-fpga-interchange/)
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library.
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The current implementation is missing essential features for place and route.
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@ -76,7 +76,7 @@ As these features are added, this implementation will become more useful.
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#### FPGA interchange fabrics
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Currently only Xilinx 7-series, UltraScale and UltraScale+ fabrics have a
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device database generator, via (RapidWright)[https://github.com/Xilinx/RapidWright].
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device database generator, via [RapidWright](https://github.com/Xilinx/RapidWright).
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##### Artix 35T example
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