From 90ece77f8d19eb41103096d6fa7b69665d7d5336 Mon Sep 17 00:00:00 2001
From: Keith Rothman <537074+litghost@users.noreply.github.com>
Date: Wed, 3 Feb 2021 15:05:12 -0800
Subject: [PATCH] Fix URLs in Markdown.

Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
---
 fpga_interchange/README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fpga_interchange/README.md b/fpga_interchange/README.md
index 3739b238..6c45105c 100644
--- a/fpga_interchange/README.md
+++ b/fpga_interchange/README.md
@@ -30,7 +30,7 @@ island based FPGA.  It consists of three primary file formats:
 This architecture implementation can be compiled in conjunction with a FPGA
 interchange device database, and the outputs from
 `fpga_interchange.nextpnr_emit`, which is part of the
-(python-fpga-interchange)[https://github.com/SymbiFlow/python-fpga-interchange/]
+[python-fpga-interchange](https://github.com/SymbiFlow/python-fpga-interchange/)
 library.
 
 The current implementation is missing essential features for place and route.
@@ -76,7 +76,7 @@ As these features are added, this implementation will become more useful.
 #### FPGA interchange fabrics
 
 Currently only Xilinx 7-series, UltraScale and UltraScale+ fabrics have a
-device database generator, via (RapidWright)[https://github.com/Xilinx/RapidWright].
+device database generator, via [RapidWright](https://github.com/Xilinx/RapidWright).
 
 ##### Artix 35T example