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clangformat for stuff I've touched

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This commit is contained in:
Eddie Hung 2018-07-31 20:57:36 -07:00
parent f646ec790a
commit 92ec2cd138
9 changed files with 31 additions and 29 deletions
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4
common/nextpnr.cc
View File

@ -70,7 +70,7 @@ WireId Context::getNetinfoSourceWire(const NetInfo *net_info) const
return getBelPinWire(src_bel, portPinFromId(driver_port));
}
WireId Context::getNetinfoSinkWire(const NetInfo *net_info, const PortRef& user_info) const
WireId Context::getNetinfoSinkWire(const NetInfo *net_info, const PortRef &user_info) const
{
auto dst_bel = user_info.cell->bel;
@ -87,7 +87,7 @@ WireId Context::getNetinfoSinkWire(const NetInfo *net_info, const PortRef& user_
return getBelPinWire(dst_bel, portPinFromId(user_port));
}
delay_t Context::getNetinfoRouteDelay(const NetInfo *net_info, const PortRef& user_info) const
delay_t Context::getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &user_info) const
{
WireId src_wire = getNetinfoSourceWire(net_info);
if (src_wire == WireId())

9
common/nextpnr.h
View File

@ -205,10 +205,7 @@ struct DecalXY
DecalId decal;
float x = 0, y = 0;
bool operator==(const DecalXY &other) const
{
return (decal == other.decal && x == other.x && y == other.y);
}
bool operator==(const DecalXY &other) const { return (decal == other.decal && x == other.x && y == other.y); }
};
struct BelPin
@ -483,8 +480,8 @@ struct Context : Arch, DeterministicRNG
// --------------------------------------------------------------
WireId getNetinfoSourceWire(const NetInfo *net_info) const;
WireId getNetinfoSinkWire(const NetInfo *net_info, const PortRef& sink) const;
delay_t getNetinfoRouteDelay(const NetInfo *net_info, const PortRef& sink) const;
WireId getNetinfoSinkWire(const NetInfo *net_info, const PortRef &sink) const;
delay_t getNetinfoRouteDelay(const NetInfo *net_info, const PortRef &sink) const;
// provided by router1.cc
bool getActualRouteDelay(WireId src_wire, WireId dst_wire, delay_t &delay);

3
common/place_common.cc
View File

@ -66,7 +66,8 @@ wirelen_t get_net_metric(const Context *ctx, const NetInfo *net, MetricType type
ymax = std::max(ymax, load_loc.y);
}
if (ctx->timing_driven && type == MetricType::COST) {
wirelength = wirelen_t((((ymax - ymin) + (xmax - xmin)) * std::min(5.0, (1.0 + std::exp(-ctx->getDelayNS(worst_slack) / 5)))));
wirelength = wirelen_t(
(((ymax - ymin) + (xmax - xmin)) * std::min(5.0, (1.0 + std::exp(-ctx->getDelayNS(worst_slack) / 5)))));
} else {
wirelength = wirelen_t((ymax - ymin) + (xmax - xmin));
}

3
common/router1.cc
View File

@ -779,7 +779,8 @@ bool router1(Context *ctx)
if (ctx->verbose)
log_info(" arc %s -> %s has %f ns slack (delay %f, budget %f)\n",
ctx->getWireName(ctx->getNetinfoSourceWire(net_info)).c_str(ctx),
ctx->getWireName(ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx])).c_str(ctx),
ctx->getWireName(ctx->getNetinfoSinkWire(net_info, net_info->users[user_idx]))
.c_str(ctx),
ctx->getDelayNS(arc_slack), ctx->getDelayNS(arc_delay),
ctx->getDelayNS(arc_budget));
tns += ctx->getDelayNS(arc_slack);

8
common/timing.cc
View File

@ -57,8 +57,8 @@ static delay_t follow_user_port(Context *ctx, PortRef &user, int path_length, de
if (is_path) {
NetInfo *net = port.second.net;
if (net) {
delay_t path_budget = follow_net(ctx, net, path_length, slack - comb_delay.maxDelay(), update, min_slack,
current_path, crit_path);
delay_t path_budget = follow_net(ctx, net, path_length, slack - comb_delay.maxDelay(), update,
min_slack, current_path, crit_path);
value = std::min(value, path_budget);
}
}
@ -162,8 +162,8 @@ void assign_budget(Context *ctx, bool quiet)
if (!ctx->user_freq && ctx->slack_redist_iter > 0) {
ctx->target_freq = 1e12 / (default_slack - min_slack);
/*if (ctx->verbose)*/
log_info("minimum slack for this assign = %d, target Fmax for next update = %.2f MHz\n", min_slack,
ctx->target_freq / 1e6);
log_info("minimum slack for this assign = %d, target Fmax for next update = %.2f MHz\n", min_slack,
ctx->target_freq / 1e6);
}
if (!quiet)

2
ecp5/arch.cc
View File

@ -415,7 +415,7 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const;
{
const auto& driver = net_info->driver;
const auto &driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);

2
generic/arch.cc
View File

@ -405,7 +405,7 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const;
{
const auto& driver = net_info->driver;
const auto &driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);

26
ice40/arch.cc
View File

@ -317,15 +317,15 @@ PortType Arch::getBelPinType(BelId bel, PortPin pin) const
return PortType(bel_wires[i].type);
}
} else {
int b = 0, e = num_bel_wires-1;
int b = 0, e = num_bel_wires - 1;
while (b <= e) {
int i = (b+e) / 2;
int i = (b + e) / 2;
if (bel_wires[i].port == pin)
return PortType(bel_wires[i].type);
if (bel_wires[i].port > pin)
e = i-1;
e = i - 1;
else
b = i+1;
b = i + 1;
}
}
@ -349,17 +349,17 @@ WireId Arch::getBelPinWire(BelId bel, PortPin pin) const
}
}
} else {
int b = 0, e = num_bel_wires-1;
int b = 0, e = num_bel_wires - 1;
while (b <= e) {
int i = (b+e) / 2;
int i = (b + e) / 2;
if (bel_wires[i].port == pin) {
ret.index = bel_wires[i].wire_index;
break;
}
if (bel_wires[i].port > pin)
e = i-1;
e = i - 1;
else
b = i+1;
b = i + 1;
}
}
@ -618,7 +618,7 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
{
const auto& driver = net_info->driver;
const auto &driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);
@ -636,13 +636,15 @@ delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
// offset = 500;
// }
if (driver.port == id_o) offset += 330;
if (sink.port == id_i0 || sink.port == id_i1 || sink.port == id_i2 || sink.port == id_i3) offset += 260;
if (driver.port == id_o)
offset += 330;
if (sink.port == id_i0 || sink.port == id_i1 || sink.port == id_i2 || sink.port == id_i3)
offset += 260;
return xscale * abs(xd) + yscale * abs(yd) + offset;
}
delay_t Arch::getBudgetOverride(const NetInfo *net_info, const PortRef& sink, delay_t budget) const
delay_t Arch::getBudgetOverride(const NetInfo *net_info, const PortRef &sink, delay_t budget) const
{
const auto &driver = net_info->driver;
if (driver.port == id_cout) {

3
ice40/main.cc
View File

@ -105,7 +105,8 @@ int main(int argc, char *argv[])
options.add_options()("asc", po::value<std::string>(), "asc bitstream file to write");
options.add_options()("read", po::value<std::string>(), "asc bitstream file to read");
options.add_options()("seed", po::value<int>(), "seed value for random number generator");
options.add_options()("slack_redist_iter", po::value<int>(), "number of iterations between slack redistribution");
options.add_options()("slack_redist_iter", po::value<int>(),
"number of iterations between slack redistribution");
options.add_options()("version,V", "show version");
options.add_options()("tmfuzz", "run path delay estimate fuzzer");
options.add_options()("test", "check architecture database integrity");