nexus: More DPHY clock ports that require general routing hop
Signed-off-by: gatecat <gatecat@ds0.me>
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a01e2c9068
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@ -510,6 +510,9 @@ X(U2END2)
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X(U3END3)
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X(U3END3)
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X(UED0THEN)
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X(UED0THEN)
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X(URXCKINE)
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X(URXCKINE)
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X(UCENCK)
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X(U3TDE5CK)
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X(UTXCKE)
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X(GENERAL)
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X(GENERAL)
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@ -166,8 +166,8 @@ struct NexusGlobalRouter
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bool is_relaxed_sink(const PortRef &sink) const
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bool is_relaxed_sink(const PortRef &sink) const
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{
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{
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// This DPHY clock port can't be routed without going through some general routing
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// These DPHY clock ports can't be routed without going through some general routing
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if (sink.cell->type == id_DPHY_CORE && sink.port == id_URXCKINE)
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if (sink.cell->type == id_DPHY_CORE && sink.port.in(id_URXCKINE, id_UCENCK, id_UTXCKE, id_U3TDE5CK))
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return true;
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return true;
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// Cases where global clocks are driving fabric
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// Cases where global clocks are driving fabric
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if ((sink.cell->type == id_OXIDE_COMB && sink.port != id_WCK) ||
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if ((sink.cell->type == id_OXIDE_COMB && sink.port != id_WCK) ||
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