ecp5: Adding new Bel pin API

Signed-off-by: David Shah <davey1576@gmail.com>

ecp5/arch.cc

@@ -224,6 +224,20 @@ WireId Arch::getBelPinWire(BelId bel, PortPin pin) const
     return ret;
 }
 
+PortType Arch::getBelPinType(BelId bel, PortPin pin) const
+{
+    NPNR_ASSERT(bel != BelId());
+
+    int num_bel_wires = locInfo(bel)->bel_data[bel.index].num_bel_wires;
+    const BelWirePOD *bel_wires = locInfo(bel)->bel_data[bel.index].bel_wires.get();
+
+    for (int i = 0; i < num_bel_wires; i++)
+        if (bel_wires[i].port == pin)
+            return PortType(bel_wires[i].type);
+
+    return PORT_INOUT;
+}
+
 // -----------------------------------------------------------------------
 
 WireId Arch::getWireByName(IdString name) const
@@ -314,6 +328,22 @@ std::string Arch::getBelPackagePin(BelId bel) const
     }
     return "";
 }
+
+std::vector<PortPin> Arch::getBelPins(BelId bel) const
+
+{
+    std::vector<PortPin> ret;
+    NPNR_ASSERT(bel != BelId());
+
+    int num_bel_wires = locInfo(bel)->bel_data[bel.index].num_bel_wires;
+    const BelWirePOD *bel_wires = locInfo(bel)->bel_data[bel.index].bel_wires.get();
+
+    for (int i = 0; i < num_bel_wires; i++)
+        ret.push_back(bel_wires[i].port);
+
+    return ret;
+}
+
 // -----------------------------------------------------------------------
 
 void Arch::estimatePosition(BelId bel, int &x, int &y, bool &gb) const

ecp5/arch.h

@@ -50,6 +50,7 @@ NPNR_PACKED_STRUCT(struct BelWirePOD {
     LocationPOD rel_wire_loc;
     int32_t wire_index;
     PortPin port;
+    int32_t type;
 });
 
 NPNR_PACKED_STRUCT(struct BelInfoPOD {
@@ -87,6 +88,9 @@ NPNR_PACKED_STRUCT(struct WireInfoPOD {
     int32_t num_bels_downhill;
     BelPortPOD bel_uphill;
     RelPtr<BelPortPOD> bels_downhill;
+
+    int32_t num_bel_pins;
+    RelPtr<BelPortPOD> bel_pins;
 });
 
 NPNR_PACKED_STRUCT(struct LocationTypePOD {
@@ -486,7 +490,7 @@ struct Arch : BaseCtx
 
     WireId getBelPinWire(BelId bel, PortPin pin) const;
 
-    BelPin getBelPinUphill(WireId wire) const
+    BelPin getBelPinUphill(WireId wire) const NPNR_DEPRECATED
     {
         BelPin ret;
         NPNR_ASSERT(wire != WireId());
@@ -500,7 +504,7 @@ struct Arch : BaseCtx
         return ret;
     }
 
-    BelPinRange getBelPinsDownhill(WireId wire) const
+    BelPinRange getBelPinsDownhill(WireId wire) const NPNR_DEPRECATED
     {
         BelPinRange range;
         NPNR_ASSERT(wire != WireId());
@@ -511,6 +515,19 @@ struct Arch : BaseCtx
         return range;
     }
 
+    BelPinRange getWireBelPins(WireId wire) const
+    {
+        BelPinRange range;
+        NPNR_ASSERT(wire != WireId());
+        range.b.ptr = locInfo(wire)->wire_data[wire.index].bel_pins.get();
+        range.b.wire_loc = wire.location;
+        range.e.ptr = range.b.ptr + locInfo(wire)->wire_data[wire.index].num_bel_pins;
+        range.e.wire_loc = wire.location;
+        return range;
+    }
+
+    std::vector<PortPin> getBelPins(BelId bel) const;
+
     // -------------------------------------------------
 
     WireId getWireByName(IdString name) const;
@@ -581,6 +598,7 @@ struct Arch : BaseCtx
     DelayInfo getWireDelay(WireId wire) const
     {
         DelayInfo delay;
+        delay.delay = 0;
         return delay;
     }
 
@@ -739,6 +757,8 @@ struct Arch : BaseCtx
     BelId getPackagePinBel(const std::string &pin) const;
     std::string getBelPackagePin(BelId bel) const;
 
+    PortType getBelPinType(BelId bel, PortPin pin) const;
+
     // -------------------------------------------------
 
     GroupId getGroupByName(IdString name) const { return GroupId(); }

ecp5/trellis_import.py

@@ -407,6 +407,12 @@ def write_database(dev_name, ddrg, endianness):
                         write_loc(db.bel.rel, "rel_bel_loc")
                         bba.u32(db.bel.id, "bel_index")
                         bba.u32(portpins[ddrg.to_str(db.pin)], "port")
+                if len(wire.belPins) > 0:
+                    bba.l("loc%d_wire%d_belpins" % (idx, wire_idx), "BelPortPOD")
+                    for bp in wire.belPins:
+                        write_loc(bp.bel.rel, "rel_bel_loc")
+                        bba.u32(bp.bel.id, "bel_index")
+                        bba.u32(portpins[ddrg.to_str(bp.pin)], "port")
             bba.l("loc%d_wires" % idx, "WireInfoPOD")
             for wire_idx in range(len(loctype.wires)):
                 wire = loctype.wires[wire_idx]
@@ -424,14 +430,18 @@ def write_database(dev_name, ddrg, endianness):
                     bba.u32(0xFFFFFFFF, "bel_uphill.bel_index")
                     bba.u32(0, "bel_uphill.port")
                 bba.r("loc%d_wire%d_downbels" % (idx, wire_idx) if len(wire.belsDownhill) > 0 else None, "bels_downhill")
+                bba.u32(len(wire.belPins), "num_bel_pins")
+                bba.r("loc%d_wire%d_belpins" % (idx, wire_idx) if len(wire.belPins) > 0 else None, "bel_pins")
+
         if len(loctype.bels) > 0:
             for bel_idx in range(len(loctype.bels)):
                 bel = loctype.bels[bel_idx]
-                bba.l("loc%d_bel%d_wires" % (idx, bel_idx), "BelPortPOD")
+                bba.l("loc%d_bel%d_wires" % (idx, bel_idx), "BelWirePOD")
                 for pin in bel.wires:
                     write_loc(pin.wire.rel, "rel_wire_loc")
                     bba.u32(pin.wire.id, "wire_index")
                     bba.u32(portpins[ddrg.to_str(pin.pin)], "port")
+                    bba.u32(int(pin.dir), "dir")
             bba.l("loc%d_bels" % idx, "BelInfoPOD")
             for bel_idx in range(len(loctype.bels)):
                 bel = loctype.bels[bel_idx]