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Update and simplify dummy arch

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Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2018-06-06 15:30:23 +02:00
parent 5ff9aafb20
commit 9afa6a2016
4 changed files with 38 additions and 154 deletions
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10
dummy/chip.cc
View File

@ -22,13 +22,3 @@
Chip::Chip(ChipArgs)
{
}
BelRange Chip::getBels() const
{
return BelRange();
}
IdString Chip::getBelName(BelId bel) const
{
return "*unknown*";
}

178
dummy/chip.h
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@ -39,104 +39,9 @@ static inline IdString portPinToId(PortPin type) { return type; }
static inline BelType belTypeFromId(IdString id) { return id; }
static inline PortPin portPinFromId(IdString id) { return id; }
struct BelId
{
uint8_t tile_x = 0, tile_y = 0;
uint16_t index = 0;
bool nil() const {
return !tile_x && !tile_y && !index;
}
} __attribute__((packed));
struct WireId
{
uint8_t tile_x = 0, tile_y = 0;
uint16_t index = 0;
bool nil() const {
return !tile_x && !tile_y && !index;
}
} __attribute__((packed));
namespace std
{
template<> struct hash<BelId>
{
std::size_t operator()(const BelId &bel) const noexcept
{
std::size_t result = std::hash<int>{}(bel.index);
result ^= std::hash<int>{}(bel.tile_x) + 0x9e3779b9 + (result << 6) + (result >> 2);
result ^= std::hash<int>{}(bel.tile_y) + 0x9e3779b9 + (result << 6) + (result >> 2);
return result;
}
};
template<> struct hash<WireId>
{
std::size_t operator()(const WireId &wire) const noexcept
{
std::size_t result = std::hash<int>{}(wire.index);
result ^= std::hash<int>{}(wire.tile_x) + 0x9e3779b9 + (result << 6) + (result >> 2);
result ^= std::hash<int>{}(wire.tile_y) + 0x9e3779b9 + (result << 6) + (result >> 2);
return result;
}
};
}
struct BelIterator
{
BelId *ptr = nullptr;
void operator++() { ptr++; }
bool operator!=(const BelIterator &other) const { return ptr != other.ptr; }
BelId operator*() const { return *ptr; }
};
struct BelRange
{
BelIterator b, e;
BelIterator begin() const { return b; }
BelIterator end() const { return e; }
};
struct WireIterator
{
WireId *ptr = nullptr;
void operator++() { ptr++; }
bool operator!=(const WireIterator &other) const { return ptr != other.ptr; }
WireId operator*() const { return *ptr; }
};
struct WireRange
{
WireIterator b, e;
WireIterator begin() const { return b; }
WireIterator end() const { return e; }
};
struct WireDelay
{
WireId wire;
DelayInfo delay;
};
struct WireDelayIterator
{
WireDelay *ptr = nullptr;
void operator++() { ptr++; }
bool operator!=(const WireDelayIterator &other) const { return ptr != other.ptr; }
WireDelay operator*() const { return *ptr; }
};
struct WireDelayRange
{
WireDelayIterator b, e;
WireDelayIterator begin() const { return b; }
WireDelayIterator end() const { return e; }
};
typedef IdString BelId;
typedef IdString WireId;
typedef IdString PipId;
struct BelPin
{
@ -144,61 +49,54 @@ struct BelPin
PortPin pin;
};
struct BelPinIterator
{
BelPin *ptr = nullptr;
void operator++() { ptr++; }
bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; }
BelPin operator*() const { return *ptr; }
};
struct BelPinRange
{
BelPinIterator b, e;
BelPinIterator begin() const { return b; }
BelPinIterator end() const { return e; }
};
struct ChipArgs
{
// ...
};
struct Chip
{
// ...
Chip(ChipArgs args);
void setBelActive(BelId bel, bool active);
bool getBelActive(BelId bel);
BelId getBelByName(IdString name) const;
WireId getWireByName(IdString name) const;
IdString getBelName(BelId bel) const;
IdString getWireName(WireId wire) const;
BelRange getBels() const;
BelRange getBelsByType(BelType type) const;
void bindBel(BelId bel, IdString cell);
void unbindBel(BelId bel);
bool checkBelAvail(BelId bel) const;
const vector<BelId> &getBels() const;
const vector<BelId> &getBelsByType(BelType type) const;
BelType getBelType(BelId bel) const;
// void getBelPosition(BelId bel, float &x, float &y) const;
// void getWirePosition(WireId wire, float &x, float &y) const;
// vector<GuiLine> getBelGuiLines(BelId bel) const;
// vector<GuiLine> getWireGuiLines(WireId wire) const;
WireRange getWires() const;
WireDelayRange getWiresUphill(WireId wire) const;
WireDelayRange getWiresDownhill(WireId wire) const;
WireDelayRange getWiresBidir(WireId wire) const;
WireDelayRange getWireAliases(WireId wire) const;
// the following will only operate on / return "active" BELs
// multiple active uphill BELs for a wire will cause a runtime error
WireId getWireBelPin(BelId bel, PortPin pin) const;
BelPin getBelPinUphill(WireId wire) const;
BelPinRange getBelPinsDownhill(WireId wire) const;
const vector<BelPin> &getBelPinsDownhill(WireId wire) const;
WireId getWireByName(IdString name) const;
IdString getWireName(WireId wire) const;
void bindWire(WireId bel, IdString net);
void unbindWire(WireId bel);
bool checkWireAvail(WireId bel) const;
const vector<WireId> &getWires() const;
PipId getPipByName(IdString name) const;
IdString getPipName(PipId pip) const;
void bindPip(PipId bel, IdString net);
void unbindPip(PipId bel);
bool checkPipAvail(PipId bel) const;
const vector<PipId> &getPips() const;
WireId getPipSrcWire(PipId pip) const;
WireId getPipDstWire(PipId pip) const;
DelayInfo getPipDelay(PipId pip) const;
const vector<PipId> &getPipsDownhill(WireId wire) const;
const vector<PipId> &getPipsUphill(WireId wire) const;
const vector<PipId> &getWireAliases(WireId wire) const;
void getBelPosition(BelId bel, float &x, float &y) const;
void getWirePosition(WireId wire, float &x, float &y) const;
void getPipPosition(WireId wire, float &x, float &y) const;
vector<GraphicElement> getBelGraphics(BelId bel) const;
vector<GraphicElement> getWireGraphics(WireId wire) const;
vector<GraphicElement> getPipGraphics(PipId pip) const;
vector<GraphicElement> getFrameGraphics() const;
};
#endif

3
dummy/main.cc
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@ -25,9 +25,6 @@ int main(int argc, char *argv[])
{
Design design(ChipArgs{});
for (auto bel : design.chip.getBels())
printf("%s\n", design.chip.getBelName(bel).c_str());
QApplication a(argc, argv);
MainWindow w;
w.show();

1
dummy/pybindings.cc
View File

@ -24,5 +24,4 @@
void arch_wrap_python() {
class_<ChipArgs>("ChipArgs");
WRAP_RANGE(Wire);
}