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mistral: Add MISTRAL_CLKBUF cell type

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Signed-off-by: gatecat <gatecat@ds0.me>
This commit is contained in:
gatecat 2021-05-15 21:28:48 +01:00
parent 6cef569155
commit 9d7f90dd89
5 changed files with 15 additions and 1 deletions
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4
mistral/arch.cc
View File

@ -248,6 +248,8 @@ bool Arch::isValidBelForCellType(IdString cell_type, BelId bel) const
return is_comb_cell(cell_type);
else if (bel_type == id_MISTRAL_IO)
return is_io_cell(cell_type);
else if (bel_type == id_MISTRAL_CLKENA)
return is_clkbuf_cell(cell_type);
else
return bel_type == cell_type;
}
@ -258,6 +260,8 @@ BelBucketId Arch::getBelBucketForCellType(IdString cell_type) const
return id_MISTRAL_COMB;
else if (is_io_cell(cell_type))
return id_MISTRAL_IO;
else if (is_clkbuf_cell(cell_type))
return id_MISTRAL_CLKENA;
else
return cell_type;
}

4
mistral/arch.h
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@ -480,6 +480,10 @@ struct Arch : BaseArch<ArchRanges>
// -------------------------------------------------
bool is_clkbuf_cell(IdString cell_type) const; // globals.cc
// -------------------------------------------------
static const std::string defaultPlacer;
static const std::vector<std::string> availablePlacers;
static const std::string defaultRouter;

2
mistral/bitstream.cc
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@ -201,7 +201,7 @@ struct MistralBitgen
int bi = ctx->bel_data(ci->bel).block_index;
if (ctx->is_io_cell(ci->type))
write_io_cell(ci, loc.x, loc.y, bi);
else if (ci->type == id_MISTRAL_CLKENA)
else if (ctx->is_clkbuf_cell(ci->type))
write_clkbuf_cell(ci, loc.x, loc.y, bi);
}
}

1
mistral/constids.inc
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@ -75,3 +75,4 @@ X(Y)
X(LOC)
X(MISTRAL_CLKENA)
X(MISTRAL_CLKBUF)

5
mistral/globals.cc
View File

@ -38,4 +38,9 @@ void Arch::create_clkbuf(int x, int y)
}
}
bool Arch::is_clkbuf_cell(IdString cell_type) const
{
return cell_type == id_MISTRAL_CLKENA || cell_type == id_MISTRAL_CLKBUF;
}
NEXTPNR_NAMESPACE_END