Modify predictDelay signature

This commit is contained in:
Eddie Hung 2018-07-30 19:19:30 -07:00
parent d5049bf0ed
commit a099aca3c2
8 changed files with 31 additions and 44 deletions

View File

@ -111,7 +111,7 @@ delay_t Context::getNetinfoRouteDelay(NetInfo *net_info, int user_idx) const
if (cursor == src_wire)
return delay + getWireDelay(src_wire).maxDelay();
return predictDelay(src_wire, dst_wire);
return predictDelay(net_info, net_info->users[user_idx]);
}
static uint32_t xorshift32(uint32_t x)

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@ -37,7 +37,6 @@ wirelen_t get_net_metric(const Context *ctx, const NetInfo *net, MetricType type
return 0;
driver_gb = ctx->getBelGlobalBuf(driver_cell->bel);
driver_loc = ctx->getBelLocation(driver_cell->bel);
WireId drv_wire = ctx->getBelPinWire(driver_cell->bel, ctx->portPinFromId(net->driver.port));
if (driver_gb)
return 0;
delay_t worst_slack = std::numeric_limits<delay_t>::max();
@ -49,9 +48,8 @@ wirelen_t get_net_metric(const Context *ctx, const NetInfo *net, MetricType type
if (load_cell->bel == BelId())
continue;
if (ctx->timing_driven && type == MetricType::COST) {
WireId user_wire = ctx->getBelPinWire(load_cell->bel, ctx->portPinFromId(load.port));
delay_t raw_wl = ctx->estimateDelay(drv_wire, user_wire);
auto slack = load.budget - raw_wl;
delay_t net_delay = ctx->predictDelay(net, load);
auto slack = load.budget - net_delay;
if (slack < 0)
tns += slack;
worst_slack = std::min(slack, worst_slack);

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@ -413,9 +413,13 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
return 200 * (abs(src.location.x - dst.location.x) + abs(src.location.y - dst.location.y));
}
delay_t Arch::predictDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const;
{
return 200 * (abs(src.location.x - dst.location.x) + abs(src.location.y - dst.location.y));
const auto& driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);
return 200 * (abs(driver_loc.x - sink_loc.x) + abs(driver_loc.y - sink_loc.y));
}
delay_t Arch::getBudgetOverride(NetInfo *net_info, int user_idx, delay_t budget) const { return budget; }

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@ -776,7 +776,7 @@ struct Arch : BaseCtx
// -------------------------------------------------
delay_t estimateDelay(WireId src, WireId dst) const;
delay_t predictDelay(WireId src, WireId dst) const;
delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const;
delay_t getDelayEpsilon() const { return 20; }
delay_t getRipupDelayPenalty() const { return 200; }
float getDelayNS(delay_t v) const { return v * 0.001; }

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@ -403,12 +403,14 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
return (dx + dy) * grid_distance_to_delay;
}
delay_t Arch::predictDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const;
{
const WireInfo &s = wires.at(src);
const WireInfo &d = wires.at(dst);
int dx = abs(s.x - d.x);
int dy = abs(s.y - d.y);
const auto& driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);
int dx = abs(driver_loc.x - driver_loc.x);
int dy = abs(sink_loc.y - sink_locy);
return (dx + dy) * grid_distance_to_delay;
}

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@ -194,7 +194,7 @@ struct Arch : BaseCtx
const std::vector<GroupId> &getGroupGroups(GroupId group) const;
delay_t estimateDelay(WireId src, WireId dst) const;
delay_t predictDelay(WireId src, WireId dst) const;
delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const;
delay_t getDelayEpsilon() const { return 0.01; }
delay_t getRipupDelayPenalty() const { return 1.0; }
float getDelayNS(delay_t v) const { return v; }

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@ -587,40 +587,23 @@ delay_t Arch::estimateDelay(WireId src, WireId dst) const
return xscale * abs(xd) + yscale * abs(yd) + offset;
}
delay_t Arch::predictDelay(WireId src, WireId dst) const
delay_t Arch::predictDelay(const NetInfo *net_info, const PortRef &sink) const
{
NPNR_ASSERT(src != WireId());
int x1 = chip_info->wire_data[src.index].x;
int y1 = chip_info->wire_data[src.index].y;
const auto& driver = net_info->driver;
auto driver_loc = getBelLocation(driver.cell->bel);
auto sink_loc = getBelLocation(sink.cell->bel);
NPNR_ASSERT(dst != WireId());
int x2 = chip_info->wire_data[dst.index].x;
int y2 = chip_info->wire_data[dst.index].y;
if (driver.port == id_cout) {
if (driver_loc.y == sink_loc.y)
return 0;
return 250;
}
int xd = x2 - x1, yd = y2 - y1;
int xd = sink_loc.x - driver_loc.x, yd = sink_loc.y - driver_loc.y;
int xscale = 120, yscale = 120, offset = 0;
// if (chip_info->wire_data[src.index].type == WIRE_TYPE_SP4_VERT) {
// yd = yd < -4 ? yd + 4 : (yd < 0 ? 0 : yd);
// offset = 500;
// }
// Estimate for output mux
for (const auto &bp : getWireBelPins(src)) {
if (bp.pin == PIN_O && getBelType(bp.bel) == TYPE_ICESTORM_LC) {
offset += 330;
break;
}
}
// Estimate for input mux
for (const auto &bp : getWireBelPins(dst)) {
if ((bp.pin == PIN_I0 || bp.pin == PIN_I1 || bp.pin == PIN_I2 || bp.pin == PIN_I3) &&
getBelType(bp.bel) == TYPE_ICESTORM_LC) {
offset += 260;
break;
}
}
if (driver.port == id_o) offset += 330;
if (sink.port == id_i0 || sink.port == id_i1 || sink.port == id_i2 || sink.port == id_i3) offset += 260;
return xscale * abs(xd) + yscale * abs(yd) + offset;
}

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@ -697,7 +697,7 @@ struct Arch : BaseCtx
// -------------------------------------------------
delay_t estimateDelay(WireId src, WireId dst) const;
delay_t predictDelay(WireId src, WireId dst) const;
delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const;
delay_t getDelayEpsilon() const { return 20; }
delay_t getRipupDelayPenalty() const { return 200; }
float getDelayNS(delay_t v) const { return v * 0.001; }