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Cleanup nesting

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This commit is contained in:
Eddie Hung 2018-08-06 19:53:42 -07:00
parent 676500b83f
commit a1d626469f
1 changed files with 58 additions and 58 deletions
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116
common/timing.cc
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@ -139,23 +139,23 @@ struct Timing
for (auto &usr : net->users) { for (auto &usr : net->users) {
auto clock_domain = ctx->getPortClock(usr.cell, usr.port); auto clock_domain = ctx->getPortClock(usr.cell, usr.port);
for (auto &port : usr.cell->ports) { for (auto &port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) { if (port.second.type != PORT_OUT || !port.second.net)
// Skip if this is a clocked output (but allow non-clocked ones) continue;
if (clock_domain != IdString() && ctx->getCellDelay(usr.cell, clock_domain, port.first, clkToQ)) // Skip if this is a clocked output (but allow non-clocked ones)
continue; if (clock_domain != IdString() && ctx->getCellDelay(usr.cell, clock_domain, port.first, clkToQ))
DelayInfo comb_delay; continue;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay); DelayInfo comb_delay;
if (is_path) { bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
// Decrement the fanin count, and only add to topographical if (!is_path)
// order if all its fanins have already been visited continue;
auto it = port_fanin.find(&port.second); // Decrement the fanin count, and only add to topographical
NPNR_ASSERT(it != port_fanin.end()); // order if all its fanins have already been visited
if (--it->second == 0) { auto it = port_fanin.find(&port.second);
topographical_order.emplace_back(port.second.net); NPNR_ASSERT(it != port_fanin.end());
queue.emplace_back(port.second.net); if (--it->second == 0) {
port_fanin.erase(it); topographical_order.emplace_back(port.second.net);
} queue.emplace_back(port.second.net);
} port_fanin.erase(it);
} }
} }
} }
@ -180,21 +180,21 @@ struct Timing
auto usr_arrival = net_arrival + net_delay; auto usr_arrival = net_arrival + net_delay;
// Iterate over all output ports on the same cell as the sink // Iterate over all output ports on the same cell as the sink
for (auto port : usr.cell->ports) { for (auto port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) { if (port.second.type != PORT_OUT || !port.second.net)
DelayInfo comb_delay; continue;
// Look up delay through this path DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay); // Look up delay through this path
if (is_path) { bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
auto &data = net_data[port.second.net]; if (!is_path)
auto &arrival = data.max_arrival; continue;
arrival = std::max(arrival, usr_arrival + comb_delay.maxDelay()); auto &data = net_data[port.second.net];
if (!budget_override) { // Do not increment path length if auto &arrival = data.max_arrival;
// budget overriden arrival = std::max(arrival, usr_arrival + comb_delay.maxDelay());
// since it doesn't require a share of the slack if (!budget_override) { // Do not increment path length if
auto &path_length = data.max_path_length; // budget overriden
path_length = std::max(path_length, net_length_plus_one); // since it doesn't require a share of the slack
} auto &path_length = data.max_path_length;
} path_length = std::max(path_length, net_length_plus_one);
} }
} }
} }
@ -236,17 +236,16 @@ struct Timing
} else if (update) { } else if (update) {
// Iterate over all output ports on the same cell as the sink // Iterate over all output ports on the same cell as the sink
for (const auto &port : usr.cell->ports) { for (const auto &port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) { if (port.second.type != PORT_OUT || !port.second.net)
DelayInfo comb_delay; continue;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay); DelayInfo comb_delay;
if (is_path) { bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
auto path_budget = net_data.at(port.second.net).min_remaining_budget; if (!is_path)
auto budget_share = budget_override ? 0 : path_budget / net_length_plus_one; continue;
usr.budget = std::min(usr.budget, net_delay + budget_share); auto path_budget = net_data.at(port.second.net).min_remaining_budget;
net_min_remaining_budget = auto budget_share = budget_override ? 0 : path_budget / net_length_plus_one;
std::min(net_min_remaining_budget, path_budget - budget_share); usr.budget = std::min(usr.budget, net_delay + budget_share);
} net_min_remaining_budget = std::min(net_min_remaining_budget, path_budget - budget_share);
}
} }
} }
} }
@ -260,28 +259,29 @@ struct Timing
// Look at all input ports on its driving cell // Look at all input ports on its driving cell
for (const auto &port : crit_net->driver.cell->ports) { for (const auto &port : crit_net->driver.cell->ports) {
if (port.second.type == PORT_IN && port.second.net) { if (port.second.type != PORT_IN || !port.second.net)
DelayInfo comb_delay; continue;
bool is_path = DelayInfo comb_delay;
ctx->getCellDelay(crit_net->driver.cell, port.first, crit_net->driver.port, comb_delay); bool is_path =
if (is_path) { ctx->getCellDelay(crit_net->driver.cell, port.first, crit_net->driver.port, comb_delay);
// If input port is influenced by a clock, skip if (!is_path)
if (ctx->getPortClock(crit_net->driver.cell, port.first) != IdString()) continue;
continue; // If input port is influenced by a clock, skip
if (ctx->getPortClock(crit_net->driver.cell, port.first) != IdString())
continue;
// And find the fanin net with the latest arrival time // And find the fanin net with the latest arrival time
const auto net_arrival = net_data.at(port.second.net).max_arrival; const auto net_arrival = net_data.at(port.second.net).max_arrival;
if (net_arrival > max_arrival) { if (net_arrival > max_arrival) {
max_arrival = net_arrival; max_arrival = net_arrival;
crit_ipin = &port.second; crit_ipin = &port.second;
}
}
} }
} }
if (!crit_ipin) if (!crit_ipin)
break; break;
// Now convert PortInfo* into a PortRef*
for (auto &usr : crit_ipin->net->users) { for (auto &usr : crit_ipin->net->users) {
if (usr.cell->name == crit_net->driver.cell->name && usr.port == crit_ipin->name) { if (usr.cell->name == crit_net->driver.cell->name && usr.port == crit_ipin->name) {
crit_path->push_back(&usr); crit_path->push_back(&usr);