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Cleanup nesting

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This commit is contained in:
Eddie Hung 2018-08-06 19:53:42 -07:00
parent 676500b83f
commit a1d626469f
1 changed files with 58 additions and 58 deletions
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36
common/timing.cc
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@ -139,13 +139,15 @@ struct Timing
for (auto &usr : net->users) {
auto clock_domain = ctx->getPortClock(usr.cell, usr.port);
for (auto &port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
// Skip if this is a clocked output (but allow non-clocked ones)
if (clock_domain != IdString() && ctx->getCellDelay(usr.cell, clock_domain, port.first, clkToQ))
continue;
DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (is_path) {
if (!is_path)
continue;
// Decrement the fanin count, and only add to topographical
// order if all its fanins have already been visited
auto it = port_fanin.find(&port.second);
@ -158,8 +160,6 @@ struct Timing
}
}
}
}
}
// Sanity check to ensure that all ports where fanins were recorded
// were indeed visited
@ -180,11 +180,13 @@ struct Timing
auto usr_arrival = net_arrival + net_delay;
// Iterate over all output ports on the same cell as the sink
for (auto port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
DelayInfo comb_delay;
// Look up delay through this path
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (is_path) {
if (!is_path)
continue;
auto &data = net_data[port.second.net];
auto &arrival = data.max_arrival;
arrival = std::max(arrival, usr_arrival + comb_delay.maxDelay());
@ -198,8 +200,6 @@ struct Timing
}
}
}
}
}
const NetInfo *crit_net = nullptr;
@ -236,17 +236,16 @@ struct Timing
} else if (update) {
// Iterate over all output ports on the same cell as the sink
for (const auto &port : usr.cell->ports) {
if (port.second.type == PORT_OUT && port.second.net) {
if (port.second.type != PORT_OUT || !port.second.net)
continue;
DelayInfo comb_delay;
bool is_path = ctx->getCellDelay(usr.cell, usr.port, port.first, comb_delay);
if (is_path) {
if (!is_path)
continue;
auto path_budget = net_data.at(port.second.net).min_remaining_budget;
auto budget_share = budget_override ? 0 : path_budget / net_length_plus_one;
usr.budget = std::min(usr.budget, net_delay + budget_share);
net_min_remaining_budget =
std::min(net_min_remaining_budget, path_budget - budget_share);
}
}
net_min_remaining_budget = std::min(net_min_remaining_budget, path_budget - budget_share);
}
}
}
@ -260,11 +259,13 @@ struct Timing
// Look at all input ports on its driving cell
for (const auto &port : crit_net->driver.cell->ports) {
if (port.second.type == PORT_IN && port.second.net) {
if (port.second.type != PORT_IN || !port.second.net)
continue;
DelayInfo comb_delay;
bool is_path =
ctx->getCellDelay(crit_net->driver.cell, port.first, crit_net->driver.port, comb_delay);
if (is_path) {
if (!is_path)
continue;
// If input port is influenced by a clock, skip
if (ctx->getPortClock(crit_net->driver.cell, port.first) != IdString())
continue;
@ -276,12 +277,11 @@ struct Timing
crit_ipin = &port.second;
}
}
}
}
if (!crit_ipin)
break;
// Now convert PortInfo* into a PortRef*
for (auto &usr : crit_ipin->net->users) {
if (usr.cell->name == crit_net->driver.cell->name && usr.port == crit_ipin->name) {
crit_path->push_back(&usr);