fix suboptimal pathing
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50aae5935d
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@ -83,16 +83,25 @@ struct QueuedWire {
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togo: f32,
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criticality: f32,
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wire: npnr::WireId,
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from_pip: Option<npnr::PipId>,
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}
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impl QueuedWire {
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pub fn new(delay: f32, congest: f32, togo: f32, criticality: f32, wire: npnr::WireId) -> Self {
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pub fn new(
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delay: f32,
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congest: f32,
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togo: f32,
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criticality: f32,
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wire: npnr::WireId,
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from_pip: Option<npnr::PipId>,
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) -> Self {
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Self {
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delay,
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congest,
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togo,
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criticality,
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wire,
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from_pip,
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}
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}
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@ -352,6 +361,7 @@ impl Router {
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ctx.estimate_delay(arc.source_wire, arc.sink_wire),
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criticality,
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arc.source_wire,
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None,
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));
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let mut bwd_queue = BinaryHeap::new();
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bwd_queue.push(QueuedWire::new(
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@ -360,6 +370,7 @@ impl Router {
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ctx.estimate_delay(arc.source_wire, arc.sink_wire),
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criticality,
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arc.sink_wire,
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None,
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));
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let mut found_meeting_point = None;
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@ -375,8 +386,6 @@ impl Router {
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let source_wire = *self.wire_to_idx.get(&arc.source_wire).unwrap();
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let sink_wire = *self.wire_to_idx.get(&arc.sink_wire).unwrap();
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self.flat_wires[source_wire as usize].visited_fwd = true;
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self.flat_wires[sink_wire as usize].visited_bwd = true;
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self.dirty_wires.push(source_wire);
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self.dirty_wires.push(sink_wire);
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@ -395,8 +404,8 @@ impl Router {
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} else {
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while found_meeting_point.is_none() {
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if let Some(source) = fwd_queue.pop() {
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let source_idx = *self.wire_to_idx.get(&source.wire).unwrap();
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if verbose {
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let source_idx = *self.wire_to_idx.get(&source.wire).unwrap();
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let source_cong = self.flat_wires[source_idx as usize].curr_cong;
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log_info!(
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"fwd: {} @ ({}, {}, {}) = {}\n",
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@ -408,6 +417,18 @@ impl Router {
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);
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}
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if self.was_visited_fwd(source_idx) {
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continue;
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}
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if let Some(pip) = source.from_pip {
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self.set_visited_fwd(source_idx, pip);
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}
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if self.was_visited_bwd(source_idx) {
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found_meeting_point = Some(source_idx);
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break;
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}
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for pip in ctx.get_downhill_pips(source.wire) {
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let pip_loc = ctx.pip_location(pip);
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let pip_coord = partition::Coord::from(pip_loc);
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@ -474,27 +495,9 @@ impl Router {
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ctx.estimate_delay(wire, arc.sink_wire),
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criticality,
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wire,
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Some(pip),
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);
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self.set_visited_fwd(sink, pip);
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if self.was_visited_bwd(sink) {
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if verbose {
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let source_cong = self.flat_wires[sink as usize].curr_cong;
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log_info!(
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"bwd: {} @ ({}, {}, {}) = {}\n",
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ctx.name_of_wire(wire).to_str().unwrap(),
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sum_delay,
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congest,
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criticality,
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qw.score()
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);
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}
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found_meeting_point = Some(sink);
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break;
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}
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fwd_queue.push(qw);
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if false && verbose {
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@ -512,9 +515,8 @@ impl Router {
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break;
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}
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if let Some(sink) = bwd_queue.pop() {
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let sink_idx = *self.wire_to_idx.get(&sink.wire).unwrap();
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if verbose {
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let sink_idx = *self.wire_to_idx.get(&sink.wire).unwrap();
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let sink_cong = self.flat_wires[sink_idx as usize].curr_cong;
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log_info!(
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"bwd: {} @ ({}, {}, {}) = {}\n",
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ctx.name_of_wire(sink.wire).to_str().unwrap(),
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@ -525,6 +527,18 @@ impl Router {
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);
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}
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if self.was_visited_bwd(sink_idx) {
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continue;
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}
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if let Some(pip) = sink.from_pip {
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self.set_visited_bwd(sink_idx, pip);
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}
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if self.was_visited_fwd(sink_idx) {
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found_meeting_point = Some(sink_idx);
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break;
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}
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for pip in ctx.get_uphill_pips(sink.wire) {
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let pip_loc = ctx.pip_location(pip);
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let pip_coord = partition::Coord::from(pip_loc);
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@ -578,12 +592,14 @@ impl Router {
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continue;
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}
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let sink_wd = &self.flat_wires[sink_idx as usize];
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let node_delay =
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ctx.pip_delay(pip) + ctx.wire_delay(wire) + ctx.delay_epsilon();
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ctx.pip_delay(pip) + ctx.wire_delay(sink.wire) + ctx.delay_epsilon();
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let sum_delay = sink.delay + node_delay;
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let congest = sink.congest
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+ (node_delay + nwd.hist_cong)
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* (1.0 + (nwd.curr_cong as f32 * self.pressure));
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+ (node_delay + sink_wd.hist_cong)
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* (1.0 + (sink_wd.curr_cong as f32 * self.pressure));
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let qw = QueuedWire::new(
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sum_delay,
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@ -591,27 +607,9 @@ impl Router {
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ctx.estimate_delay(wire, arc.source_wire),
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criticality,
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wire,
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Some(pip),
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);
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self.set_visited_bwd(source, pip);
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if self.was_visited_fwd(source) {
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if verbose {
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let source_cong = self.flat_wires[source as usize].curr_cong;
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log_info!(
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"bwd: {} @ ({}, {}, {}) = {}\n",
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ctx.name_of_wire(wire).to_str().unwrap(),
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sum_delay,
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congest,
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criticality,
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qw.score()
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);
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}
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found_meeting_point = Some(source);
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break;
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}
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bwd_queue.push(qw);
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if false && verbose {
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@ -629,6 +627,9 @@ impl Router {
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// don't break when bwd goes bad, fwd was written by lofty, who knows all, this was written by dummy kbity
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//break;
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}
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self.flat_wires[source_wire as usize].visited_fwd = true;
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self.flat_wires[sink_wire as usize].visited_bwd = true;
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}
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}
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