Add ctx->checksum(), slightly improve log messages
Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
parent
477c33efba
commit
a29bfc788e
@ -67,8 +67,10 @@ void print_utilisation(const Context *ctx)
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log_break();
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log_info("Device utilisation:\n");
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for (auto type : available_types) {
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log_info("\t%20s: %5d/%5d\n", ctx->belTypeToId(type.first).c_str(ctx),
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get_or_default(used_types, type.first, 0), type.second);
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IdString type_id = ctx->belTypeToId(type.first);
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int used_bels = get_or_default(used_types, type.first, 0);
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log_info("\t%20s: %5d/%5d %5d%%\n", type_id.c_str(ctx),
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used_bels, type.second, 100*used_bels/type.second);
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}
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log_break();
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}
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@ -53,4 +53,127 @@ void IdString::initialize_add(const BaseCtx *ctx, const char *s, int idx)
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ctx->idstring_idx_to_str->push_back(&insert_rc.first->first);
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}
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static uint32_t xorshift32(uint32_t x)
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{
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x ^= x << 13;
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x ^= x >> 17;
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x ^= x << 5;
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return x;
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}
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uint32_t Context::checksum() const
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{
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uint32_t cksum = xorshift32(123456789);
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uint32_t cksum_nets_sum = 0;
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for (auto &it : nets)
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{
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auto &ni = *it.second;
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uint32_t x = 123456789;
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x = xorshift32(x + xorshift32(it.first.index));
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x = xorshift32(x + xorshift32(ni.name.index));
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if (ni.driver.cell)
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x = xorshift32(x + xorshift32(ni.driver.cell->name.index));
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x = xorshift32(x + xorshift32(ni.driver.port.index));
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x = xorshift32(x + xorshift32(getDelayChecksum(ni.driver.budget)));
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for (auto &u : ni.users) {
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if (u.cell)
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x = xorshift32(x + xorshift32(u.cell->name.index));
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x = xorshift32(x + xorshift32(u.port.index));
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x = xorshift32(x + xorshift32(getDelayChecksum(u.budget)));
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}
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uint32_t attr_x_sum = 0;
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for (auto &a : ni.attrs) {
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uint32_t attr_x = 123456789;
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attr_x = xorshift32(attr_x + xorshift32(a.first.index));
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for (uint8_t ch : a.second)
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attr_x = xorshift32(attr_x + xorshift32(ch));
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attr_x_sum += attr_x;
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}
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x = xorshift32(x + xorshift32(attr_x_sum));
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uint32_t wire_x_sum = 0;
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for (auto &w : ni.wires) {
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uint32_t wire_x = 123456789;
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wire_x = xorshift32(wire_x + xorshift32(getWireChecksum(w.first)));
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wire_x = xorshift32(wire_x + xorshift32(getPipChecksum(w.second)));
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wire_x_sum += wire_x;
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}
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x = xorshift32(x + xorshift32(wire_x_sum));
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uint32_t pip_x_sum = 0;
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for (auto &p : ni.pips) {
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uint32_t pip_x = 123456789;
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pip_x = xorshift32(pip_x + xorshift32(getPipChecksum(p.first)));
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pip_x = xorshift32(pip_x + xorshift32(p.second));
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pip_x_sum += pip_x;
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}
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x = xorshift32(x + xorshift32(pip_x_sum));
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cksum_nets_sum += x;
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}
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cksum = xorshift32(cksum + xorshift32(cksum_nets_sum));
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uint32_t cksum_cells_sum = 0;
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for (auto &it : cells)
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{
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auto &ci = *it.second;
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uint32_t x = 123456789;
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x = xorshift32(x + xorshift32(it.first.index));
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x = xorshift32(x + xorshift32(ci.name.index));
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x = xorshift32(x + xorshift32(ci.type.index));
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uint32_t port_x_sum = 0;
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for (auto &p : ci.ports) {
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uint32_t port_x = 123456789;
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port_x = xorshift32(port_x + xorshift32(p.first.index));
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port_x = xorshift32(port_x + xorshift32(p.second.name.index));
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if (p.second.net)
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port_x = xorshift32(port_x + xorshift32(p.second.net->name.index));
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port_x = xorshift32(port_x + xorshift32(p.second.type));
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port_x_sum += port_x;
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}
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x = xorshift32(x + xorshift32(port_x_sum));
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uint32_t attr_x_sum = 0;
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for (auto &a : ci.attrs) {
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uint32_t attr_x = 123456789;
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attr_x = xorshift32(attr_x + xorshift32(a.first.index));
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for (uint8_t ch : a.second)
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attr_x = xorshift32(attr_x + xorshift32(ch));
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attr_x_sum += attr_x;
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}
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x = xorshift32(x + xorshift32(attr_x_sum));
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uint32_t param_x_sum = 0;
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for (auto &p : ci.params) {
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uint32_t param_x = 123456789;
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param_x = xorshift32(param_x + xorshift32(p.first.index));
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for (uint8_t ch : p.second)
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param_x = xorshift32(param_x + xorshift32(ch));
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param_x_sum += param_x;
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}
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x = xorshift32(x + xorshift32(param_x_sum));
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x = xorshift32(x + xorshift32(getBelChecksum(ci.bel)));
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x = xorshift32(x + xorshift32(ci.belStrength));
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uint32_t pin_x_sum = 0;
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for (auto &a : ci.pins) {
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uint32_t pin_x = 123456789;
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pin_x = xorshift32(pin_x + xorshift32(a.first.index));
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pin_x = xorshift32(pin_x + xorshift32(a.second.index));
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pin_x_sum += pin_x;
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}
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x = xorshift32(x + xorshift32(pin_x_sum));
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cksum_cells_sum += x;
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}
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cksum = xorshift32(cksum + xorshift32(cksum_cells_sum));
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return cksum;
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}
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NEXTPNR_NAMESPACE_END
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@ -302,10 +302,14 @@ struct Context : Arch
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{
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// xorshift64star
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// https://arxiv.org/abs/1402.6246
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uint64_t retval = rngstate * 0x2545F4914F6CDD1D;
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rngstate ^= rngstate >> 12;
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rngstate ^= rngstate << 25;
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rngstate ^= rngstate >> 27;
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return rngstate * 0x2545F4914F6CDD1D;
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return retval;
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}
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int rng() { return rng64() & 0x3fffffff; }
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@ -351,6 +355,8 @@ struct Context : Arch
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std::sort(a.begin(), a.end());
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shuffle(a);
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}
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uint32_t checksum() const;
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};
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NEXTPNR_NAMESPACE_END
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@ -480,6 +480,7 @@ bool place_design_sa(Context *ctx)
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{
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SAPlacer placer(ctx);
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placer.place();
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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return true;
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}
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@ -480,6 +480,7 @@ bool route_design(Context *ctx)
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while (!netsQueue.empty()) {
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if (iterCnt == 200) {
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log_warning("giving up after %d iterations.\n", iterCnt);
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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return false;
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}
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@ -616,6 +617,7 @@ bool route_design(Context *ctx)
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}
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log_info("routing complete after %d iterations.\n", iterCnt);
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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return true;
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}
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@ -78,6 +78,7 @@ static delay_t follow_net(Context *ctx, NetInfo *net, int path_length,
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void assign_budget(Context *ctx, float default_clock)
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{
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log_break();
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log_info("Annotating ports with timing budgets\n");
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// Clear delays to a very high value first
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delay_t default_slack = delay_t(1.0e12 / default_clock);
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@ -117,6 +118,8 @@ void assign_budget(Context *ctx, float default_clock)
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net.first.c_str(ctx), ctx->getDelayNS(user.budget));
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}
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}
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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}
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NEXTPNR_NAMESPACE_END
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@ -34,6 +34,8 @@ BelId Arch::getBelByName(IdString name) const { return BelId(); }
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IdString Arch::getBelName(BelId bel) const { return IdString(); }
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uint32_t Arch::getBelChecksum(BelId bel) const { return 0; }
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void Arch::bindBel(BelId bel, IdString cell) {}
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void Arch::unbindBel(BelId bel) {}
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@ -75,6 +77,8 @@ WireId Arch::getWireByName(IdString name) const { return WireId(); }
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IdString Arch::getWireName(WireId wire) const { return IdString(); }
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uint32_t Arch::getWireChecksum(WireId wire) const { return 0; }
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void Arch::bindWire(WireId wire, IdString net) {}
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void Arch::unbindWire(WireId wire) {}
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@ -98,6 +102,8 @@ PipId Arch::getPipByName(IdString name) const { return PipId(); }
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IdString Arch::getPipName(PipId pip) const { return IdString(); }
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uint32_t Arch::getWireChecksum(WireId wire) const { return 0; }
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void Arch::bindPip(PipId pip, IdString net) {}
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void Arch::unbindPip(PipId pip) {}
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@ -87,6 +87,7 @@ struct Arch : BaseCtx
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BelId getBelByName(IdString name) const;
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IdString getBelName(BelId bel) const;
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uint32_t getBelChecksum(BelId bel) const;
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void bindBel(BelId bel, IdString cell);
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void unbindBel(BelId bel);
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bool checkBelAvail(BelId bel) const;
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@ -100,6 +101,7 @@ struct Arch : BaseCtx
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WireId getWireByName(IdString name) const;
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IdString getWireName(WireId wire) const;
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uint32_t getWireChecksum(WireId wire) const;
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void bindWire(WireId wire, IdString net);
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void unbindWire(WireId wire);
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bool checkWireAvail(WireId wire) const;
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@ -108,6 +110,7 @@ struct Arch : BaseCtx
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PipId getPipByName(IdString name) const;
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IdString getPipName(PipId pip) const;
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uint32_t getPipChecksum(PipId pip) const;
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void bindPip(PipId pip, IdString net);
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void unbindPip(PipId pip);
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bool checkPipAvail(PipId pip) const;
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@ -125,6 +128,7 @@ struct Arch : BaseCtx
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delay_t getDelayEpsilon() const { return 0.01; }
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delay_t getRipupDelayPenalty() const { return 1.0; }
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float getDelayNS(delay_t v) const { return v; }
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uint32_t getDelayChecksum(delay_t v) const { return 0; }
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std::vector<GraphicElement> getFrameGraphics() const;
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std::vector<GraphicElement> getBelGraphics(BelId bel) const;
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@ -828,6 +828,9 @@ void parse_json_file(std::istream *&f, std::string &filename, Context *ctx)
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{
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auto *parser = new JsonParser::JsonFrontend();
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parser->execute(f, filename, ctx);
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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log_break();
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}
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NEXTPNR_NAMESPACE_END
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16
ice40/arch.h
16
ice40/arch.h
@ -515,6 +515,11 @@ struct Arch : BaseCtx
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return id(chip_info->bel_data[bel.index].name.get());
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}
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uint32_t getBelChecksum(BelId bel) const
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{
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return bel.index;
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}
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void bindBel(BelId bel, IdString cell)
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{
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assert(bel != BelId());
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@ -607,6 +612,11 @@ struct Arch : BaseCtx
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return id(chip_info->wire_data[wire.index].name.get());
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}
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uint32_t getWireChecksum(WireId wire) const
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{
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return wire.index;
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}
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void bindWire(WireId wire, IdString net)
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{
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assert(wire != WireId());
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@ -646,6 +656,11 @@ struct Arch : BaseCtx
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PipId getPipByName(IdString name) const;
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IdString getPipName(PipId pip) const;
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uint32_t getPipChecksum(PipId pip) const
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{
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return pip.index;
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}
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void bindPip(PipId pip, IdString net)
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{
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assert(pip != PipId());
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@ -758,6 +773,7 @@ struct Arch : BaseCtx
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delay_t getDelayEpsilon() const { return 20; }
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delay_t getRipupDelayPenalty() const { return 200; }
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float getDelayNS(delay_t v) const { return v * 0.001; }
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uint32_t getDelayChecksum(delay_t v) const { return v; }
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// -------------------------------------------------
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@ -487,12 +487,14 @@ static void promote_globals(Context *ctx)
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// Main pack function
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bool pack_design(Context *ctx)
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{
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log_break();
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pack_constants(ctx);
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promote_globals(ctx);
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pack_io(ctx);
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pack_lut_lutffs(ctx);
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pack_nonlut_ffs(ctx);
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pack_ram(ctx);
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log_info("Checksum: 0x%08x\n", ctx->checksum());
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return true;
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}
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