caiyu/nextpnr
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Use getBelType()

Browse Source
This commit is contained in:
Eddie Hung 2018-08-19 17:38:55 -07:00
parent 17918b5992
commit a7ccc01c45
2 changed files with 3 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
xc7/arch.cc
View File

@ -235,9 +235,8 @@ WireId Arch::getBelPinWire(BelId bel, IdString pin) const
{ {
WireId ret; WireId ret;
auto site_index = torc_info->bel_to_site_index[bel.index];
auto pin_name = pin.str(this); auto pin_name = pin.str(this);
if (torc_info->site_index_to_type[site_index] == id_SLICE_LUT6) { if (getBelType(bel) == id_SLICE_LUT6) {
// For all LUT based inputs (I1-I6,O,OQ,OMUX) then change the I/O into the LUT // For all LUT based inputs (I1-I6,O,OQ,OMUX) then change the I/O into the LUT
if (pin_name[0] == 'I' || pin_name[0] == 'O') { if (pin_name[0] == 'I' || pin_name[0] == 'O') {
switch (torc_info->bel_to_z[bel.index]) { switch (torc_info->bel_to_z[bel.index]) {
@ -249,6 +248,7 @@ WireId Arch::getBelPinWire(BelId bel, IdString pin) const
} }
} }
} }
auto site_index = torc_info->bel_to_site_index[bel.index];
auto &site = torc_info->sites.getSite(site_index); auto &site = torc_info->sites.getSite(site_index);
ret.index = site.getPinTilewire(pin_name); ret.index = site.getPinTilewire(pin_name);

3
xc7/arch.h
View File

@ -449,8 +449,7 @@ struct Arch : BaseCtx
{ {
NPNR_ASSERT(bel != BelId()); NPNR_ASSERT(bel != BelId());
auto name = torc_info->bel_to_name(bel.index); auto name = torc_info->bel_to_name(bel.index);
auto site_index = torc_info->bel_to_site_index[bel.index]; if (getBelType(bel) == id_SLICE_LUT6) {
if (torc_info->site_index_to_type[site_index] == id_SLICE_LUT6) {
// Append LUT name to name // Append LUT name to name
name.reserve(name.size() + 2); name.reserve(name.size() + 2);
name += "_"; name += "_";