gowin: Add PLL support for GW1NR-4 chips
Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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@ -2123,11 +2123,15 @@ void Arch::bind_pll_to_bel(CellInfo *ci, PLL loc)
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bel = id("R1C18_rPLL");
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break;
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}
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if (family == "GW1N-4") {
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bel = loc == PLL::left ? id("R1C10_rPLL") : id("R1C28_rPLL");
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break;
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}
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if (family == "GW1NR-9C" || family == "GW1NR-9") {
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bel = loc == PLL::left ? id("R10C1_rPLL") : id("R10C47_rPLL");
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break;
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}
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break;
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return;
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default:
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return;
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}
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@ -1044,7 +1044,7 @@ static void pack_plls(Context *ctx)
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switch (ci->type.hash()) {
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case ID_rPLL: {
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if (parm_device == "GW1N-1" || parm_device == "GW1NZ-1" || parm_device == "GW1NR-9C" ||
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parm_device == "GW1NR-9") {
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parm_device == "GW1NR-9" || parm_device == "GW1N-4") {
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pll_disable_unused_ports(ctx, ci);
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// A cell
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std::unique_ptr<CellInfo> cell = create_generic_cell(ctx, id_rPLL, ci->name.str(ctx) + "$rpll");
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